Synchronous 4-bit Up/down Binary Counters

  • Thread starter ravenprp
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http://palantir.swarthmore.edu/maxwell/courses/e015/F06/labs/lab01/74191.pdf [Broken]

I have this IC with me, and I have to draw the timing diagrams. I'm doing good so far, except that during the middle of a clock pulse, the U(not)/D changes from 0 to 1 (counting up to down). It happens dead in the middle of the high part of the clock pulse. What do I do? Is there some sort of precedence issue that I should follow?

Thanks.
 
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  • #2
If you look at U(not)/D, you will see it is an input. If you look at all the inputs, you will see that they all happen in the middle of a clock pulse. This is because it takes a finite amount of time for the signal to propogate into the part. This is called setup time and it should be specified in the data sheet somewhere.
 

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