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Forums
Engineering
Electrical Engineering
Transistor current gain in saturation mode
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[QUOTE="LvW, post: 5432196, member: 541169"] Supplementing Jony130`s excellent answer, I like to mention the reasons for the drastic current gain decrease in saturation mode. As an example, for VBE=0.7 V and VCE=0.2 V we have VBC=+0.5 V, which means: The base-collector pn junction is forward biased with 0.5 V. As a consequence, the base node is connected to two forward biased pn junctions and the base current will increase correspondingly. At the same time, the collector current is decreased because the portion of the base current going towards the collector (open BC junction) has the opposite direction if compared with the "normal" collector current. Hence, the ratio IC/IB is drastically reduced. The exact value is hard to determine, but for switching applications we are on the safe side assuming IC/IB=10...20. [/QUOTE]
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Electrical Engineering
Transistor current gain in saturation mode
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