I have an amplifier circuit as shown in this picture, http://www.fileden.com/files/2006/8/19/175303/4.wmf" [Broken] And I need to do a DC analysis on it to find the current into the base lead (I_B) and the voltage over the collector-emitter (V_CE). Realizing this is DC and that the capacitor will block any input signal, I can re-draw the circuit as, http://www.fileden.com/files/2006/8/19/175303/5.wmf" [Broken] And now re-arrange it to be, http://www.fileden.com/files/2006/8/19/175303/6.wmf" [Broken] Which can be further simplified to, http://www.fileden.com/files/2006/8/19/175303/7.wmf" [Broken] By using the thevenin equivalent of the circuit to the left of the transistor. I now need to write KVL expressions around the loops (in the last picture), V_BB = I_B * R_th + .7 volts + R4 * (I_B + I_C) Assuming we are in the active region, I_C = β * I_B V_BB = I_B * (R_th + R4 (1 + β)) Solving for I_B, I_B = (V_BB - .7 volts) / (R_th + R4(1 + β)) Where the .7 volts is arising due to the nature of the silicon transistor being used in the circuit, I_B is the current into the base lead, I_C is the current into the collector, R_th is the thevenin equivalent resistance of R1 in parallel with R2, and V_BB is the thevenin voltage equal to the voltage drop across R2 in the circuit. Now to find the voltage drop over the collector-emitter, It should be, V_CE = V_CC – I_C * (R3 + R4) Where, again, I_C = β * I_B since we assume we are in the active region of the transistor The external power supply used to amplify the input signal, V_CC must drop down to zero over 3 segments…there is one drop over R3, one over R4, so the rest must drop over the collector-emitter. V_CE = V_CC – β * (R3 + R4) * I_B, This should be the load line of the circuit. To help find the end points of the load line, Set I_C = 0, so V_CE = V_CC Set V_CE = 0, so I_C = V_CC / (R3 + R4) I now have (in theory) all the information I desire. But I am not at all very confident in my work and if I did everything correctly. Also, I am unsure of myself when graphing the I_C curves (as a function of V_CE) to confirm that I am actually operating in the active region of the transistor when I compare my operating point on the load line with the I_C curve. I have, I_C = β * I_B, So if I just choose I_B = some value, and then get a corresponding I_C value, I should be WELL within the active region (which is what it should be), even for small values of I_B. So how does all of this look? I am I doing it correctly? You-all don’t need to worry so much about the numbers, I am just trying to solve everything symbolically right now, I can go back and plug in values later.