# TTL circuit

Hi

I am trying to design a TTL circuit, which is based on a NOT-gate (http://en.wikibooks.org/wiki/File:Electronics_TTLNOT.PNG). It has to do the following:

When 5V are applied to it, it should deliver a short pulse such to A. The exact length of the pulse is not important at all, what is important is that it does not continously deliver a current.

When 0V are applied, a short pulse is to be delivered to $\overline A$. So basically it almost has to behave the same as the NOT-gate, but instead of a continous signal the transistor should only deliver pulses.

I guess I need some simple configuration of transistors. Can someone point me in the right direction? What would be a good place to start?

Best,
Niles.

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uart
Hi

I am trying to design a TTL circuit, which is based on a NOT-gate (http://en.wikibooks.org/wiki/File:Electronics_TTLNOT.PNG). It has to do the following:

When 5V are applied to it, it should deliver a short pulse such to A. The exact length of the pulse is not important at all, what is important is that it does not continously deliver a current.

When 0V are applied, a short pulse is to be delivered to $\overline A$. So basically it almost has to behave the same as the NOT-gate, but instead of a continous signal the transistor should only deliver pulses.

I guess I need some simple configuration of transistors. Can someone point me in the right direction? What would be a good place to start?

Best,
Niles.
Your specifications don't really make sense Niles. You say when the input is logic 1 (5 volts) you want a pulse on "A", but in the inverter pictured "A" is the input (so normally you wouldn't use it as an output).

Can you clarify. Does you proposed gate have a single input (line) and a single output (line) or does it have two outputs (lines).

Your specifications don't really make sense Niles. You say when the input is logic 1 (5 volts) you want a pulse on "A", but in the inverter pictured "A" is the input (so normally you wouldn't use it as an output).

Can you clarify. Does you proposed gate have a single input (line) and a single output (line) or does it have two outputs (lines).
Hi

Thanks for helping, and sorry about my confusing and outright wrong OP. When 5V is applied to A, the short pulse must flow towards the emitter (lower branch, connected to ground). When 0V is applied to A, the pulse must go through $\overline A$.

So there is 1 input and 2 outputs. Just ask if I am not making any sense still, I am the weak link here.

uart
No sorry it still doesn't make sense to me. You say there are two outputs but you only refer to the single output $\bar{A}$.

BTW. Here I am referring to the physical number of output lines, not the number of different states that a given output line may assume.

So again, does your proposed circuit have a single output line or does it have two of them?

There should be two outputs: One is the pulse that goes through $\overline A$ and the other output is the one that goes through the lower branch, e.g. the lower branch could send the current through a coil, just like $\overline A$ could. So e.g. two coils are driven in pulsed operation by switching A on/off.

uart
Ok I see what you are are thinking. Instead of grounding the emitter, you want to use both the emitter and collector as two independent outputs. Sorry it can't be done, not with that circuit.

Is the extension to a circuit capable of that difficult?

vk6kro
This is a topic called edge detection.

You can detect one edge of a square wave like this:

As you can see, it takes more than one transistor to do this, however this one uses NAND gates which come in a package of 4 in an integrated circuit that costs about a dollar.

It would be numbered 74C00, 74HC00 or similar. The C and HC affect how the device is powered and driven, but the function is essentially the same. The 00 is the important bit and it should be a NAND gate package.

There are more complex circuits to detect both edges of a square wave.

There are also dedicated monostable chips like the 74HC221 which will generate a pulse on a falling or a rising edge of an input square wave. These are harder to find, but readily available from Ebay's "buy it now" sellers.
eg
http://www.ebay.com.au/itm/10PCS-74...368?pt=LH_DefaultDomain_0&hash=item3cc6d2e3a8

I've been thinking about this for a while, and I really can't understand that there isn't a much easier way to do this. In principle can't I combine two NOT-gates with two capacitors and achieve the same result?

jim hardy
Gold Member
2019 Award
Dearly Missed
nowadays most people take advantage of the integrated circuit as their building block
although it is laudable to build from individual components as you are doing. It is the best way to learn.

Take a look at the venerable 555 timer, there are scores of hobby sites dedicated to it.
It can be configured to deliver pulses and to edge trigger.
If you tie TRIG pin to THRESH pin and use them for input, it inverts.
A 556 is two 555's in one package .
555 is not quite so fast as TTL but will interface with it quite nicely.

discover circuits dot com has a friendly circuit design forum for beginners.

A google on 555 hobbyist circuits should give you a wealth of links to explore.

Once you've honed your skills with logic you can backtrack to doing it with individual transistors.

old jim

es1
This is a topic called edge detection.
As you can see, it takes more than one transistor to do this
One transistor positive edge detect. Circuit produces a ~10uS negative pulse on every rising edge of Vi.

.OPTIONS LIST NODE POST
.OP current
.TRAN 1uS 200uS

V5V 10 0 DC 5.0V
Vi a 0 PULSE ( 0 5.0 5u 0.1u 0.1u 50u 100u)

C1 a 1 0.1uF
C2 1 0 0.1uF
R1 1 0 33
Rb 1 2 1K

Rc 10 nA 100K
Q1 nA 2 0 twoN3904

.model twoN3904 NPN(Is=6.734f Xti=3 Eg=1.11 Vaf=74.03 Bf=416.4 Ne=1.259
+ Ise=6.734f Ikf=66.78m Xtb=1.5 Br=.7371 Nc=2 Isc=0 Ikr=0 Rc=1
+ Cjc=3.638p Mjc=.3085 Vjc=.75 Fc=.5 Cje=4.493p Mje=.2593 Vje=.75
+ Tr=239.5n Tf=301.2p Itf=.4 Vtf=4 Xtf=2 Rb=10)

.PRINT V(a) V(1) V(2) V(na)

.END