Hi, I fabricated a very simple back-gate FET. I used highly Boron doped (so, P-type) Si wafer as a gate and then, grown SiO2 thermally as a dielectric. And, deposited N-type semiconductor followed by Au/Cr deposition as electrodes (source and drain). And I measured Ids-Vds and Ids-Vg. The results show the graphs of typical P-type semiconductor, even though N type semiconductor was used. I'm struggling to understand it but haven't yet. Is it possible this is because of highly doped P-type Si gate? (I looked for several reference and found that all used the same types of semiconductor and gate (i.e. highly doped n type Si gate + n-type semiconductor or highly doped p type Si gate + p-type semiconductor) Or is there anything I should check? Thank you.