Modern computers don't have circuits dedicated for subtraction. They do it by using the method of complements. All is well when the 2 operands are signed 2's complement numbers. The result of addition will be another 2's complement which, when interpreted as a 2's complement number, will give the correct result provided that there's no overflow. Consider a 4 bit number. The unsigned range is 0 <-> 15. Signed range is -8 <-> 7. What happens when I do 15u - 14u? The first thought which comes is "Do the 2's complement of 14 and do 15 + (-14)". But then, -14 is not in the range of a 4 bit number. But if I do it anyway (Flip all bits and add 1): Code (Text): 1111 + 0010 ------------ 1 0001 = 0001 4 bits It seems to work. My problem is that 0010 is not equal to -14 in 2's complement. It's just 2. Question: Why does it work? And is this even the actual way it's happening?