Verilog Display module

  1. Hello,
    I have to make a Display module in verilog and first time i want to create a ball which is moving and i have a question, the vertial/horizontal synchronization module is done, the question is about displaying the image using RGB. So, i use 640x480 display and 25Mhz clock frequency and first time when i created the module i didnt took in consideration that the fpga displays 60 frames in 1.15 second and i wrote somthing like move evreytime when x=? and y=? with 2px and then i realised that i wouldnt be able to see the image because it will be moving too fast. Aint i am right??? I was thinking to implement a counter which counts the number of frames and makes the ball to move every 20, 30, 40 frames. So first of all i want to ask if it is right what i am saying and in this case what is the best delay to chose?
    Also, i will have acces to the the FPGA to test the modules in a few days, i dont know what`s happening in reality :D. I only simulated the HV signals in modelsim and they look good.
     
    Last edited: Apr 21, 2014
  2. jcsd
  3. I would look at the final result. There is probably no issue. 480p updates at 60Hz, movies at 24Hz, 480i at interleaved 60Hz. Let's say you moved 5 pixels every frame. That will move a ball across the screen in 640/5 or about 150 frames which is over 2 seconds. 1/2 second isn't unreasonable which is over 20 pixels per frame.
     
  4. I want to ask 1 more thing. What is happening if i dont give a specific value to a pixel? its black by default?
    For exemple:
    if(x>30&&x<80&&y>30&&y<50) begin
    R=3b`111;
    G=3b`000;
    B=2b`00;
    end
    The pixels of the specified area in if statement will be red, but what is happening with the others? Do i have to make an else and to give them a color or its automatically black?
     
  5. Depends on the surrounding code. What do you set R, G, B to for other values of x and y. For example if you set R,G,B to 0 before you enter the "if", then they would be 0 by default if the "if" was not entered.

    Question: What value do you think they would be if you didn't set them to a default value? Where would that value come from?

    Question: What happens when you don't define all possible states for a case statement (or a sequence of if-else statements)?
     
    Last edited: Apr 22, 2014
  6. Hello, I have some problems with implementing a vga controller on a nexys 2 fpga board.The HV synchronization module works fine at first view, monitors says it displays the right resolution 640x480. The problem is that the RGB module doesnt display what i write to do. For exmple for the folowing code it displays black instead of green and purple instead of white.
    if(posx<=60&&posy<=100) begin
    red<=3'b000;
    green<=3'b111;
    blue<=2'b00;
    end else begin
    blue<=2'b11;
    red<=3'b111;
    green<=3'b111;
    end
    Also for the next code it displays for 60x100 area green and if posy<100 and posx>60 it displays blue and rest of the screen is black... and it should display in 60x100 green and the rest of the screen must be blue.
    if(posx<=60&&posy<=100) begin
    red<=3'b000;
    green<=3'b111;
    blue<=2'b00;
    end else begin
    blue<=2'b11;
    red<=3'b000;
    green<=3'b000;
    end
    Does anybody had such problems and know what its wrong???
    This is the UFC file.
    net "clk50" loc = "B8";

    net "HS" loc = "T4" ;
    net "VS" loc = "U3";

    net "red[0]" loc = "R9";
    net "red[1]" loc = "T8";
    net "red[2]" loc = "R8";

    net "green[0]" loc = "N8";
    net "green[1]" loc = "P8";
    net "green[2]" loc = "P6";

    net "blue[0]" loc = "U5";
    net "blue[1]" loc = "U4";
     
  7. first just display 1 color at a time on the whole screen to debug the color channels. Then once that is sorted out the rest will be easy.
     
  8. If i dont put an if or else statement it doesnt display anything. Ill try to create another sync module. I think the one i use at this moment its buggy.
     
  9. I have no idea what your code does overall.

    If you just set red, green, blue in the always block, it should drive those pins to what you set them, which should be easy enough to probe.
     
  10. I will display the code. It makes me crazy, it works like a paranormal thing :D.
    The problem is the following. In RGB module in the always block if i say red<=x value, green <=y value etc it doesnt display anything, i must use an if-else statement to display anything. With the current code from RGB it displays a black rectangler for the positions posx<=60, posy<=100 only what is above posy=100 is magenta, the rest of the screen is black. So in this case if i combine green with red or blue, green it doesnt work. On the other hand, if i dont combine green with anything, it displays the right colors, but in the same way, with an if-else statement and anything below posy is black.
    meBigGuy thanks for trying to help me. As i said above, i cant display any color without if-else. If i must use if posx<=639 && posy<=479 --- give values to red,green,blue else give other values to red green blue.
    If i dont use the else it doesnt display any color, if i use if-else it displays the colors from if statements and the colors which must be displayed in else arent displayed below the value of posy from if.... I cant understand what is the reason of this.
    Code (Text):
    module VGASync(
        input clock,
        output reg HS,
        output reg VS,
        output reg [9:0] posx,
        output reg [9:0] posy);

    parameter hsync_width=799;
    parameter hsync_fall=655;  //pozitia unde se termina front porch sau unde semnalul devin 0
    parameter hsync_rise=751;  //pozitia unde incepe back porch sau unde semnalul revine la 1
     
    parameter vsync_width=524;
    parameter vsync_fall=490;  //pozitia unde se termina front porch sau unde semnalul devin 0
    parameter vsync_rise=492;  //pozitia unde incepe back porch sau unde semnalul revine la 1

    always @(posedge clock) begin


        if(posx >= hsync_fall && posx < hsync_rise) begin
            HS=0;
            end else begin
            HS=1;
        end
       

        if(posy >= vsync_fall && posy < vsync_rise) begin
            VS=0;
            end else begin
            VS=1;
        end
        if (posx < hsync_width)  begin
                posx<=posx+1;
            end else begin
                posx<=0;
                if(posy < vsync_width) begin
                    posy<=posy+1;
                end else begin
                    posy<=0;
                end
        end
    end
    endmodule
     
    Code (Text):

    module RGB(
        input clock,
        input  [9:0] posx,
        input  [9:0] posy,
        output reg [2:0] red,
        output reg [2:0] green,
        output reg [1:0] blue
        );
         reg [6:0] size=0;

        always @(posedge clock)begin
        if(posx<=60&&posy<=100) begin
                red<=3'b000;
                green<=3'b111;
                blue<=2'b00;
            end else begin
                blue<=2'b11;
                red<=3'b111;
                green<=3'b111;
        end
    end
       
           
    endmodule
     
    Code (Text):
    module clock(
        input clk50,
        output clk25
        );
         
         reg clk25_int;
         
         always @(posedge clk50) begin
            clk25_int<=~clk25_int;
         end
         
         BUFG buffer(.I(clk25_int),.O(clk25));
         
         
    endmodule
     
    Code (Text):

    module testop(
        input clk50,
        output HS,
        output VS,
        output [2:0] red,
        output [2:0] green,
        output [1:0] blue
        );
         wire clk25;
         wire [9:0] posx;
         wire [9:0] posy;
         clock clock_inst(.clk50(clk50),   
                                .clk25(clk25));
        VGASync VGASync_inst(.clock(clk25),
                                    .HS(HS),
                                    .VS(VS),
                                    .posx(posx),
                                    .posy(posy));
        RGB RGB_inst(.clock(clk25),
                        .posx(posx),
                        .posy(posy),
                        .red(red),
                        .green(green),
                        .blue(blue));
    endmodule
     
     
    Last edited: May 2, 2014
  11. If you have a simulator, then that is the way to do it. Build a testbench and look at waveforms.

    I expect the IO is incorrectly connected/defined. I don't see anything obvious in your code.

    I would set 1 color at a time in the if and make sure what I am seeing makes sense. Set the else section to all zeros. Or, just do the opposite. set the if portion to zero and set the else portion.

    Try all ones for 1 color to start. Then verify each bit works for the color.

    Regarding the verilog itself:

    It is a good idea to name module outputs with _o and inputs with _i. Really helps with reading the code.

    Also, line up the begin ends in whatever consistent method you want to use.
     
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