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VHDL syntax error

  • #1

Homework Statement


Creating an Up/Down counter with an output for both units and tens. (which can then be displayed on 7 segnment displays)


Homework Equations





The Attempt at a Solution



Code:
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity UpDownCount is
  port(Clk, UpDown, reset: in std_logic;
  unit, tens: out std_logic_vector(3 downto 0)
  );
End UpDownCount;

Architecture behv2 of UpDownCount is
signal units1, tens1: unsigned(3 downto 0);
begin
  
  process(UpDown, Clk, reset)
  variable CountUnits, CountTens : unsigned (3 downto 0);
  begin
      
  if (Clk'event and UpDown='1') then
     ****if CountUnits ='1111' then
      CountTens := CountTens + '1';
    else
     ****CountUnits := CountUnits + '1';  
    end if;
  elsif (Clk'event and UpDown='0') then
    if CountUnits = '0000' then
      CountTens := CountTens - '1';
    else CountUnits := CountUnits - '1';
  end if;
end if;
  end process
end architecture
The two lines with the stars are the ones where there are errors apparently. For the first one it says there is a syntax error near " ' ", and the second one it says it is expecting an "end" near "elseif". So I'm thinking is there a problem with my if-then statements? Do I need to use parenthesis to wrap the code thats included in the then part? I know its probably something quite simple, but I can't figure it out.
 

Answers and Replies

  • #2
Päällikkö
Homework Helper
517
10
I've got very limited experience with VHDL (and don't have a simulator installed), but rather than CountUnits = '1111', try using CountUnits = "1111". Same goes for CountUnits ='0000'. Did this help?
 
  • #3
It did indeed, I forgot that youe need to use " when dealing with 0000 instead of just 0 etc.
Thank you! There's also a ton of other mistakes in there, but I cleared them up too.
 

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