My teacher assigned this problem for homework and I'm completely lost in what exactly I'm supposed to do. Btw "logic works" is a program we use to implement the circuits. Using Logic Works, construct a circuit to detect overflow in 4-bit signed-2’s complement addition. Connect your circuit (in Logic Works) to the 4-bit adder included with your kit. As discussed in class, overflow detection can be accomplished by comparing the sign of the addition inputs to the sign of the output. If the two inputs share the same sign and the output has a different sign, then overflow has occurred. Hint: Can overflow occur if the two inputs have a different sign? No. Use only parts available in your pencil box: 4-bit adder – 74_283 NANDs – 74_00 NOTs – 74_04 Further hint: Tie the carry input (C0) of the 4-bit adder to logic zero (or GND) lest you see a lot of unknown values in your output. Ignore the carry out bit (C4). Test your circuit using a timing file for several different cases (at least 4), which clearly show examples of overflow and non-overflow. For each case explain what is happening in the circuit (i.e. “we are trying to add minus five to minus four and thus overflow because the circuit can only represent down to minus eight”). I dont really understand what he wants me to do. Do I just build a circuit and the inputs are two 4 bit values and the adder adds the two binary numbers and somehow I detect to see if overflow occured? I don't understand what the output to the circuit would be? If overflow occurs what will happen? And how do I even detect overflow in my circuit in the first place. I'm sorry if this is too detailed to answer, but I'm really confused about this whole thing. Thanks a lot!