Recent content by Loulou21

OMG...SORRYYYYYY! I figured the problem myself! For the primitive gates of verilog, I had first entered the inputs and then the ouput...Because I thought it was like the gates I myself had implemented using transistors...But when I first entered the output then the inputs (like: nand myNand...

designing a two-bit adder using verilog's primitive gates_I get "z" for my outputs Hi, I am trying to write verilog code for a two bit adder using verilog's primitive gates. I had implemented a two bit adder before...using gates I myself had implemented with nmos and pmos transistors, with...