Hello!
I am wondering if anyone knows what R_L and C_L on a TTL circuit means? I think it is load resistance and load capacitance, but how are they connected to the TTL? I am specifically thinking about a 74LS74 Dual Positive-Edge-Triggered D Flip-Flop.
Hello!
I'm currently investigating a TTL logic circuit (TI 74LS74), and I'm stuck with a few shortifications. What does CLK stand for? It is represented in the logic diagram, and has implication on pulse duration. I have searched through a lot of litterature without finding any clue.
Thanks...