Recent content by valastar

Wow 8 gates! Is that inclusive or exclusive of the inverters that you used? The solution has not been given out yet, so I'm still working on it. I was able to demorgan the solution down to: -(-a*-b*-c)*-(-a*-c*-d)*-(-a*-b*-d)*-(-b*-c*-d) Is that the minimized equation that you used? I...

Yes, that is correct.

Homework Statement Hey PF! I'm supposed to "Optimize the equation for minimal input-output delay with 3-input NAND gates of 1.8ns delay each." It'll become much clearer at my attempt at a solution, I hope. Homework Equations De Morgan's laws, K-maps, the sort... The Attempt at...