Hazard-free AND-OR circuits proof

[Orikon]

I've been at this for a while now and I'm getting nowhere. The problem is to prove that a two level AND-OR (sum of products) circuit corresponding to the complete sum of a logic function is always hazard free (static hazard). I can't even figure out where to begin with this, any help would be appreciated :smile:

[berkeman]

What is meant by hazard free? I'm not familiar with that term in the context of logic design. Are you talking about metastability in flip-flop and latching circuits?