mathrocks
Oct22-04, 09:12 PM
I have to design a circuit that does the following operations:
Add L to w w<--w+L
Increment w w<--w+1
arithimetic left shift w w<--arithemetic left shift of w
2's complement of w w<--w'+1
Bit-wise complement of w w<--w'
load L into w w<--L
How do I go about even starting to make this circuit using only inverter gates, NAND gates, 4 input multiplexers, D flip flops, and a 4bit adder.
There has to be some easy way through a simple truth table. My teacher likes to just draw the entire circuit out, but I can't see it that way.
Thank you!
Add L to w w<--w+L
Increment w w<--w+1
arithimetic left shift w w<--arithemetic left shift of w
2's complement of w w<--w'+1
Bit-wise complement of w w<--w'
load L into w w<--L
How do I go about even starting to make this circuit using only inverter gates, NAND gates, 4 input multiplexers, D flip flops, and a 4bit adder.
There has to be some easy way through a simple truth table. My teacher likes to just draw the entire circuit out, but I can't see it that way.
Thank you!