Measuring output voltage for rectifier with filter

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SUMMARY

This discussion focuses on measuring output voltage in a rectifier circuit with filtering components. The user initially observed voltage ripple between the drain of PMOS (Vh) and NMOS (Vl) without capacitors or resistors. After adding a capacitor between Vh and Vl, a voltage drop was noted, leading to further experiments involving grounding and the effects of a 1pF capacitor and a 100K resistor. The user concluded that grounding Vl, while connecting the capacitor and resistor to ground, resulted in unexpected voltage readings, prompting questions about best practices in N-stage rectifiers.

PREREQUISITES
  • Understanding of PMOS and NMOS transistor operation
  • Knowledge of capacitor and resistor behavior in circuits
  • Familiarity with voltage measurement techniques in electronic circuits
  • Basic principles of grounding in electrical engineering
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  • Research the effects of grounding on voltage measurements in rectifier circuits
  • Learn about the design and analysis of N-stage rectifiers
  • Explore the role of filtering components in power supply circuits
  • Investigate the impact of parasitic capacitance in high-frequency applications
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Electrical engineers, circuit designers, and students studying power electronics who are interested in understanding voltage measurement techniques and grounding effects in rectifier circuits.

shaikss
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I need your help in understanding the concept.
Actually, I am trying to understand the grounding concept here:

Attached is the snapshot:
Hi Folks,

I need your help in understanding the concept of how to measure the output voltage.



1. Initially, I tried to monitor the voltage between the drain of PMOS(Vh) and drain of NMOS(Vl). Since there is no cap and no resistor, I observed ripple.
Second attachment is the output of the same.

2. Then I connected a cap in between net 'vh' and net 'vl'. Then I observed a drop down in the voltage as shown in third file.
3. Out of my curiosity and to cross-check how grounding impacts: I have conducted below experiment:

I connected one end of cap of 1pf and res of 100K to Vh and the other end of cap and res are grounded. I measured the output between Vh and Vl. As expected, I observed the output as in case 1.

4. I grounded Vl (which shouldn't be case) and grounded one end of cap and res to ground while the other end is being connected to Vh. I observed output across resistor. Fourth file is attached for its output. In this attached file, there are two plots. The plot with lower voltage is the one I have observed when I measured the voltage across resistor when it is grounded and Vl is not grounded.

5. Later on, from my experiment 2, I realized that the voltage is drooping down. So, I increased the time scale and then checked how its actually going on. I observed some interesting results. Fifth file is attached.

Can you explain me why it is happening so?

If I go for N-stage rectifier, the Vl of first stage is always grounded.
So, is it good practice to do so.

Please clarify my querie
 

Attachments

  • Screenshot-1.png
    Screenshot-1.png
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  • output_Vh_vl_input_800mV.png
    output_Vh_vl_input_800mV.png
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  • output_Vh_vl_input_800mV_with_1p_cap.png
    output_Vh_vl_input_800mV_with_1p_cap.png
    16.4 KB · Views: 542
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Most obvious answer would be the output(s) is where no bias signal is connected.
 

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