Thread: Karnaugh Maps
View Single Post
Kenneth Mann
Dec14-05, 06:57 PM
P: 410
29. Synchronous Circuit Example - - - BCD counter

This insertion is an application of the K-Map and its accompanying truth table, to the design of a typical synchronous sequential circuit - - - a BCD counter. As such, this unit will involve four J-K flip-flop units, one to hold each bit of the BCD value. It is our task to configure these count elements so that they will sequence properly through the BCD count range. We shall see, that using our approach, this is a fairly simple task.

The basic circuit consists of the four J-K flip-flops that are dedicated to containing our count value, as is shown in figure 50 - - - plus some,as of yet, undetermined logic that will cause the values of our flip-flops to cycle through the BCD values, synchronously, as they receive pulses to their clock inputs. For our purposes, the "set" and "clear" inputs to the flip-flops are not needed, and are thus kept tied to a high input (Vcc) value. Also, the Q' values are not needed and are thus not shown, All of the counting is controlled simply by toggling each of the flip-flops at the proper times, and thus their "J" and "K" inputs are tied together. Whenever we need to toggle them, we put a "1" value on them. Otherwise, we hold them at "0". The circuitry that will control this action is the "counter control module" shown in figure 50. This module takes the "Q" values from the four flip-flops, and from those, determines which flip-flop(s) to toggle at the next clock, and for the one(s) selected, sends a "1" value to the "J/K" input(s).

To determine which flip-flops are to be toggled at each count, and thus to define the logic equations and the resulting logic, we simply observe our BCD count values into the truth table, as is shown in figure 51. In order to know which flip-flop will be enabled to toggle at each count value, we simply observe which ones are to change. Thus, for example, the lowest order flip flop will change at each count (0 to 1 to 0 to 1, etc.) thus that flip-flop will always be enabled. We simply tie it to "1" (Vcc). The "third" flip-flop, on the other hand, will only change value (toggle) on two occasions, when it is at "3" and goes to "4", and when it is at "7" and goes to "8". For each of the four flip-flops (except the first, which is the trivial case), we mark in the truth table where it is about to 'toggle'. Thus, for the second flip-flop (Jb), we mark in five places, for the third (Jc), we mark two places, for the fourth (Jd), we mark two, and for the carry (Co), we mark one place. Thus what we get is the truth table as is filled in in figure 51. Note also that, since this is a BCD counter, values "10" through "15" are not used and thus are marked as "dont-care" values.

The next task is simply to transfer our truth-table entry values into our Karnaugh maps, one for each of our functions (Ja through Jd and Co). In actuality, "Ja" is the trivial case and need not be transferred to the map. What we get then is the maps shown in figure 52. The nice thing about our approach with this example, is the fact that we didn't have to first figure out our initial Boolean terms and translate these to the truth table. We went directly from our count values to the table, putting the values in, more-or-less, by the numbers. The resulting logic for these functions, which will define our circuitry, will be shown in the next insertion.


P.S: Note that where we didn't use the "Set" and "Rst" values here, we have them available if we wish, for such things as manual setting counter, etc.
Attached Thumbnails
Figure 50.jpg   Figure 51.jpg   Figure 52.jpg