[VHDL] Xilinx Multi-source error

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SUMMARY

The forum discussion addresses the Xilinx error "ERROR:Xst:528 - Multi-source in Unit on signal ", which occurs due to conflicting output signals from two FDC instances: and . The issue arises from the use of tristate buffers at the outputs of both modules, leading to high impedance states that Xilinx tools cannot resolve. To resolve this, users must ensure proper signal definitions and output drive logic to avoid multi-source conflicts.

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dduardo
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Code:
ERROR:Xst:528 - Multi-source in Unit <codec> on signal <OP>
Sources are: 
   Output signal of FDC instance <compression/OP>
   Output signal of FDC instance <decompression/OP>

There are tristate buffers at the outputs of both the compression and decompression modules. Therefore if the compression is outputing, the decompression will be high impedance and vice versa. The problem is that Xilinx doesn't like how I'm doing it. How can I go about connecting the two outputs together?
 
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I suspect that the main reason that no one has responded to this question is that, you haven't given enough information. For example, how are your signals defined? If they are defined improperly the reply could easily happen. Also, the nature of your output drive logic could be a problem. To tackle the problem all the info on it is needed>

KM
 

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