Recent content by kriegsmachine

All set. I built my idea, only took about 30 minutes and it works perfectly. I just cranked up the clock speed to 10 kHz so the display updates seemingly instantly. Thanks for the help everyone.

I was thinking of OR-ing together the 8 outputs of the binary counters, so when they all reach zero the output of the OR gate is zero. Take that signal and AND it with the clock pulses and we have a stopping mechanism. I'm going to try my ideas later, so I will post the results sometime soon.

I only have access to 7400 series TTL chips. I have a new idea and I think it will work, but it seems almost too easy. I plan on loading two stringed 4-bit binary counters with the 8-bit binary. Then counting down on those until zero is reached, meanwhile using 3 decade counters to count up...

No I am not, but I looked into the Karnaugh map idea and that seemed like I would need far too many chips for it to be practical. I don't see why I would need 21 outputs. There are 8 inputs, and 4 outputs for each 7-segment display. Thats a total of 12 outputs. Minus the two MSBs on the...

Designing 8-bit Binary to BCD Converter I have to design and implement an 8-bit binary to BCD converter **using only ICs** I have an algorithm that works just fine in converting an 8-bit binary to BCD that can be sent to three 7-segment displays. It is called the double dabble method. Please...