Recent content by SaShiMe
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Electrical Engineering - Steady-State Voltage across Capacitor
ohh, so Vc=-ib(-j) =-5.785<-91.46 =-5.785sin(5t-91.46) (sin because current lead voltage in capacitor)- SaShiMe
- Post #19
- Forum: Engineering and Comp Sci Homework Help
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Electrical Engineering - Steady-State Voltage across Capacitor
hmm, Vc=ib*(-j) Vc=(5.785<-1.46)(1<-90) did i get the sign wrong?- SaShiMe
- Post #17
- Forum: Engineering and Comp Sci Homework Help
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Electrical Engineering - Steady-State Voltage across Capacitor
so Vc=ib*(-j) Vc(t)=5.785<-91.46 =5.785sin(5t-91.46)- SaShiMe
- Post #15
- Forum: Engineering and Comp Sci Homework Help
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Electrical Engineering - Steady-State Voltage across Capacitor
ok I've got ib=5.785<-1.46 =(5.783-j0.147) ia=(14.217+j0.147) =14.29<-0.5924 i know i need ib and ic to caculate, but i don't know how...- SaShiMe
- Post #13
- Forum: Engineering and Comp Sci Homework Help
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Electrical Engineering - Steady-State Voltage across Capacitor
OHH, ia+ib=20<0 ia-loop ia(3+j5)=0 ib-loop ib(15+j25-j)+(ib-10<0)(12+15j)=0 so instead of ia loop=0 and ib loop=0. i have ia(3+j5)=ib(15+j25-j)+(ib-10<0)(12+15j) is that correct?- SaShiMe
- Post #11
- Forum: Engineering and Comp Sci Homework Help
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Electrical Engineering - Steady-State Voltage across Capacitor
ok, but i have no way to know the voltage drop across 20<0 and 10<0 right? should i change my loop?- SaShiMe
- Post #9
- Forum: Engineering and Comp Sci Homework Help
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Electrical Engineering - Steady-State Voltage across Capacitor
oh, so i have missed out that there's a voltage drop across 20<0 and 10<0 current source? is that what you meant?- SaShiMe
- Post #7
- Forum: Engineering and Comp Sci Homework Help
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Electrical Engineering - Steady-State Voltage across Capacitor
voltage drop across current source in Ic loop? is it (10<0-ib)(12+j15)?- SaShiMe
- Post #5
- Forum: Engineering and Comp Sci Homework Help
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Electrical Engineering - Steady-State Voltage across Capacitor
hmm that's what i am confused about, initially, i tried it this way, but i am not sure if its correct. denote phase angle as < notation. ia+ib=20<0 ic-loop (10<0*3)+(10<0-ib)(12+j5)=0 ia-loop ia(3+j5)=0 ib-loop ib(15+j25-j)+(ib-10<0)(12+15j)=0 am i correct?- SaShiMe
- Post #3
- Forum: Engineering and Comp Sci Homework Help
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Electrical Engineering - Steady-State Voltage across Capacitor
Homework Statement Find the steady-state voltage Vc(t) across the capacitor. Homework Equations jwL,-j/wC The Attempt at a Solution thats all i can do, i have no idea how to even start... T.T its depressing...- SaShiMe
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- Capacitor Electrical Electrical engineering Engineering Voltage
- Replies: 18
- Forum: Engineering and Comp Sci Homework Help