How many flip-flop per state?

[success2be]

How many flip-flops do I need based on the following requirement? I'm thinking 2 flip-flop since each flip-flop can be a 0 or 1. So each flip-flop holds 2 states.

Design a clocked synchronous state machine with two inputs, X and Y, and one output, Z. The output should be 1 if the number of 1 inputs on X and Y since reset is a multiple of 4, and 0 otherwise.

At first glance, you might think the machine needs an infinite number of states, since it counts 1 inputs over an arbitrarily long time. However, since the output indicates the number of inputs received modulo 4, four states are sufficient.

[berkeman]

I think it may require one more FF for a total of three FFs. Hint -- don't forget the Reset state in your state diagram....

[berkeman]

Oh, and with 3 FFs, you will end up having some unused states. Be sure to design your logic circuit so that if you end up in one of those illegal states, you vector back to a legal state (usually the Reset state).

[success2be]

I don't think I'm understanding the requirements correctly.

When does Z output 1? It reads as if Z outputs 1 when X & Y are 1, but then why do I need 4 states / 4 modulus?

[berkeman]

Here's a little bigger hint, but hopefully not the whole answer. I'd start with a list of the states something like the following:

0 = 0b000 = reset or idle state (or sum=0 for multiple clocks)
1 = 0b001 : sum=sum+X+Y=multiple of 1; Z=0
2 = 0b002 : sum=sum+X+Y=multiple of 2; Z=0
3 = 0b003 : sum=sum+X+Y=multiple of 3; Z=0
4 = 0b004 : sum=sum+X+Y=multiple of 4; Z=1
5 unused state
6 unused state
7 unused state