
#1
Jan2112, 08:10 PM

P: 89

1. The problem statement, all variables and given/known data
Can somebody explain why the voltage across the capacitor (v0) lags vi? 2. Relevant equations 3. The attempt at a solution 1. The problem statement, all variables and given/known data 2. Relevant equations 3. The attempt at a solution 



#2
Jan2112, 10:09 PM

P: 89

I proved it with a vector diagram.
Let I be the reference phase ie. 0 degrees. Because the voltage across R is in phase with I it also has 0 phase. The capacitor voltage V0 lags I by 90 degrees ie. 90 Vi=V0+Rvoltage. This shows Vi vector after I (R voltage) but before V0. Therefore Vi leads V0. I still would appreciate a more intuitive explanation if somebody has one. 


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