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CMOS gate for the logic function |
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| Apr8-12, 10:27 PM | #1 |
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CMOS gate for the logic function
Hello. One of my friends told me that the logic function for (A.or.B).and.(C.or.D) is
![]() From a book, I know the P1, P2 , N1, N2 form a NAND. The same for P3, P4, N3, N4. And P5, P6, N5, N6 form a NOR. My question is, is this circuit the same as (A.or.B).and.(C.or.D) ? Thank you |
| Apr8-12, 10:59 PM | #2 |
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O/P of first stage(nand) = (A.B)* , second stage = (C.D)*
and third stage(nor) = ( (A.B)* + (C.D)* )* = (A.B)** . (C.D)** = A.B.C.D |
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