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What is the difference in applying -ve voltage at emitter and +ve coll

 
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Feb15-13, 09:50 PM   #1
 

What is the difference in applying -ve voltage at emitter and +ve coll


What is the difference in applying -ve voltage at emitter and +ve voltage at collector in attached circuit image? Really what I think is both circuits in thae image are identical. But then why -VEE?

-Devanand T
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Feb16-13, 06:37 PM   #2
 
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The power supply voltages also affect the necessary input voltages.

For example in the second diagram, the transistor with -1.3 volts on its base will be turned off if the negative supply line is grounded but it is conducting if this line is at -5.2 volts.

This is because the base is more positive than the negative supply line in the second case, but less positive in the first case.
Feb17-13, 05:59 AM   #3
 
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Quote by dexterdev View Post
What is the difference in applying -ve voltage at emitter and +ve voltage at collector in attached circuit image? Really what I think is both circuits in thae image are identical. But then why -VEE?

-Devanand T
Over what range of input voltages will the arrangement in (a) function as an amplifier?

What about (b)?
Feb17-13, 07:52 AM   #4
 

What is the difference in applying -ve voltage at emitter and +ve coll


the circuit in (a) is basic ECL unit, range of inputs is 2 logic states at input -1.7 V and -0.8 V.

I was asking that what difference (a) has with (b) in voltage supply applied in terms of polarity.
Feb17-13, 09:22 PM   #5
 
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Quote by dexterdev View Post
the circuit in (a) is basic ECL unit, range of inputs is 2 logic states at input -1.7 V and -0.8 V.

I was asking that what difference (a) has with (b) in voltage supply applied in terms of polarity.
(b) will function in the same manner, but not with the input/output voltages that cause (a) to work.
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