Register to reply

J-K master slave flip flop

by Amith2006
Tags: flip, flop, master, slave
Share this thread:
May6-07, 04:51 AM
P: 421
1. The problem statement, all variables and given/known data
Does an edge triggered J-K master slave flip flop exist? In a clocked J-K master slave flip flop, the master may be positive edge triggered and the slave may be negative edge triggered or vice versa. Can this flip flop be called an edge triggered J-K master slave flip flop?If so,is it positive edge triggered or negative edge triggered?Then what about the truth table? In the column of clock in the truth table, should a pulse symbol or positive edge or negative edge be drawn?

2. Relevant equations

3. The attempt at a solution
Phys.Org News Partner Science news on
Apple to unveil 'iWatch' on September 9
NASA deep-space rocket, SLS, to launch in 2018
Study examines 13,000-year-old nanodiamonds from multiple locations across three continents
May6-07, 08:00 PM
P: 181
... you forgot section 3.
May6-07, 10:52 PM
P: 85
whoa hold on there thats a lot of questions in one.

Basicly it is possible to have either a positive or negative edged flip flop. The equation for the inputs is derived from the timing diagram. If an output is asserted on the falling edge of the flip flop its negative edge triggered (as it goes from positive to negative) - else its asserted on the rising edge of the clk cycle and its a positive edged triggered flip flop

So how are these questions dealt with ?

Heres an example i posted earlier.
not the best example - its all i could find now - but see how the implementation is done - using a timing diagram:

so in essence - theoretically a JK flip flop or any flop flop can be edge triggered and its design implementation will thus come from its timing diagram (or take that into account)

Register to reply

Related Discussions
Why does a quark flip-flop? High Energy, Nuclear, Particle Physics 1
JK flip flop question. Electrical Engineering 2
J-k flip flop Engineering, Comp Sci, & Technology Homework 3
Jk flip flop Engineering, Comp Sci, & Technology Homework 3
How many flip-flop per state? Electrical Engineering 4