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[Digital Systems]NAND-Gate Implementation

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l46kok
#1
Sep2-07, 11:17 PM
P: 296
1. The problem statement, all variables and given/known data
For the output function Z=A'C+BC'

Where A,B,C are inputs and A',B',C' are the complements of the inputs respectively

Implement the design using only NAND GATES


2. Relevant equations
K-Map, maybe???


3. The attempt at a solution
I haven't taken digital system design course in years, so I don't even know where to start this problem. Can somebody start me off with some hints then I'll attempt the problem?
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verd
#2
Sep2-07, 11:34 PM
P: 146
this one is pretty simple. You don't need to worry about K-Maps because K-Maps are for simplifying messy boolean expressions. The expression you have, Z=A'C+BC' is a very simple one.

In practice, constructing a digital circuit is cheapest by implementing it using only NAND gates, so I guess the idea is to show you how it's done.

Basically each component, NOT, OR, AND, can each be made up of an assortment of NAND gates. All you do is put little blocks of these NAND gate configurations together the same as you would with regular NOT, OR, and AND gates.

Here's a good quick tutorial on it:
http://www.colchsfc.ac.uk/electronic...OR%20Gates.pdf


Hope this helps.
l46kok
#3
Sep3-07, 01:12 AM
P: 296
Quote Quote by verd View Post
this one is pretty simple. You don't need to worry about K-Maps because K-Maps are for simplifying messy boolean expressions. The expression you have, Z=A'C+BC' is a very simple one.

In practice, constructing a digital circuit is cheapest by implementing it using only NAND gates, so I guess the idea is to show you how it's done.

Basically each component, NOT, OR, AND, can each be made up of an assortment of NAND gates. All you do is put little blocks of these NAND gate configurations together the same as you would with regular NOT, OR, and AND gates.

Here's a good quick tutorial on it:
http://www.colchsfc.ac.uk/electronic...OR%20Gates.pdf


Hope this helps.
(Hits head) Of course, Demorgan's!

Ok so basically

Z = A'C+BC'

Setting A'C = X, BC' = Y

Z = X + Y
Z' = (X'Y')'
Z' = [(A'C)'(BC')']'

Since DeMorgan's theorem gives Z', for Z, just make an inverter at the end to complement the function. Is this a valid solution?

verd
#4
Sep3-07, 10:48 AM
P: 146
[Digital Systems]NAND-Gate Implementation

You can use NAND gates to make up all of the other gates. The way I look at it is like blocks, I just put them together and cancel redundant gates when everything is assembled.

I made the following to illustrate what I'm trying to say:



Hope this helps
awais bashir
#5
Feb19-11, 07:30 AM
P: 2
why u remove implements in last step?
HenzNett
#6
Feb19-11, 07:11 PM
P: 6
Quote Quote by awais bashir View Post
why u remove implements in last step?
two inverters cancel out each other.
in other words, if you have a's complement's complement, that's just a itself!
awais bashir
#7
Feb20-11, 01:44 AM
P: 2
what are registers& and flip floop..and difference b/w them.?


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