Recent content by hemant03

Hi, Can I get some learning material or guidance on how to build equipment for generating specific waveforms of DO-160 section 22? Thanks

Hi, I have a 4 pole active LPF. I am seeing that the amplitude of Vs1 & Vs2 is higher than the amplitude of input signal. I am not sure how. In my calculation, I have taken the amplitude of the fundamental harmonic of the square wave (input) into consideration, reduce it by 6db and multiply...

Thanks for the help!

The output is lower than the input as expected. Input = 0-10V square wave @ 1KHz Output = Hi-9.5V; Lo-0.4 @ 1Khz not a square wave though. My expectation was to see the output amplitude being around 7 V but that's not the case. Am I looking at it in the right way? Thanks,

Hi, I am trying to understand the impact of cut off frequency on the gain and trying to relate it in time domain but unable to do so. For e.g., I have built a single pole RC filter wherein R and C values are chosen to match the cut off frequency of 1K (R = 10KΩ/C = 16nF). The input is a square...

Hi, Oh! I guess there was a misunderstanding. What I meant was how do i attenuate. I believe I have figured that out. Thanks for the idea though. Thanks, - Hemant

115vac 10amps. 3 phase. Can you send me the circuit. I am not sure of what to use as reference after full wave rectification.

No, the need is full wave rectification as overvtg can occur on any of the cycle. For the second section, the neutral of the 3 phase is tied to the chassis/system gnd and pcb gnd is also tied to the same so , i guess the answer would be no. So, what are other options available to me?

Hi, I have to detect overvoltage on each of the 3 phases (individually) of a 3 phase AC signal. The 3 phase AC source has a neutral that is grounded and I have to use the same ground plane for my PCB. I was thinking of using a full bridge rectifier for each of the 3 phase but the problem is...

Hi, I was trying to simulate a simple inverting amplifier in LTSpice. However, the results that I get don't agree with what I am supposed to get. Please look at the PDF attached. Based on the current law, it is easy to tell that Vout = -Vin. But I am seeing Vout = app. 0V. Am I missing...

You could see a current to voltage converter op-amp design

Hi, I have attached a sample PMOS circuitry that I have simulated. I am actually using a PMOS FET.

Hi, I believe that to make a PMOS work, Vgs (th) needs to be negative but when I give -5V to source and connect it in a source follower mode i.e. vg = -5V, I do get an output. Can anyone tell me how and why? Thanks, - Hemant

Hi, Thanks for the response but my question is specific to the graph showing output saturation voltage v/s load current for output being high or low. Basically I am unable to understand the relation between output sat. voltage, load current and output being a high or low. Thanks, - Hemant

Hi, I am new to circuit designing and I have a question on one of the parameters in the spec sheet of op - amp. I don't quiet understand (see the graph) what does the output saturation voltage v/s (overdrive voltage or load current) is and why is it almost the same for outout being low or...