After more research I realized that the height isn't random but it is the sum of all of the sincs at that frequency. So why it may not be logical visually mathematically it is logical for the exact reason of being reversible. However I was able to help limit the amount to which the bin affected...
I understand that for the FFT the resolution or bin size is a function of the number of samples in your signal and that while padding the signal with zeros will make the graph look more precise it will not enable you to resolve between two frequencies if they are contained in the same bin. What...
Let me preface this by saying I am very new to FPGA's.
I am trying to find a way to sample 3 channels simultaneously at a resolution of 16 bits per channel and at a rate of at least 600KSPS per channel and then 2 channels at a resolution of 16 bits at a rate of at least 200KSPS. I've decided...
Im not talking aliasing or sampling rate I am talking duration of sampling or number of samples. Our sampling rate is high enough above the nyquist frequency I am just concerned we don't have enough samples to resolve a 60hz wave using an fft given the periodic nature of of the fft.
I am wondering what the minimum sampling duration must be in order to accurately resolve a 60Hz wave. I know the FFT works with periodic waves about the number N but I am not sure how this relates to say a sampling duration that is 1 half the sampling period of a 60 Hz wave. I'm worried that the...
That definitely sounds like a possibility. Assuming my ADC can clock out the data at a rate similar to the FIFO memory and both are above the master clock rate of my MSP430, say 16MHz, could I in practice shift out the data from the ADC to the FIFO at a rate of 16Mhz? Is there some limitation of...
I am having a bit of a sampling rate problem in terms of choosing a microprocessor for the project I am working on. Where everything stands right now is that my sampling rate needs to be 1MSPS at a resolution of 16 bits for approximately 8 milli seconds. I need to sample five channels...
So I think I found an inverter that fits my needs, its the LTC1550CGN inverter. It has an input between 4.5 and 6.5, so I'll have to run the battery through a positive regulator first and then through this. It says that the output is adjustable in the 16pin model by attaching a voltage divider...
I think this design could work, the only difference is that I will be working with batteries rather than a power supply. I could definitely put in some inductors provided they are not excessive large. I apologize for using such vague terms as excessively but as of right now I don't know what the...
I am trying to invert the the output of a battery so I can run an op-amp double ended with 5 volts and -5 volts. The battery itself produces 7.5 volts so I am passing it through a linear regulator to drop it down to 5 volts with low noise, at the expense of heat/efficiency. This is all great...
Well i was actually more interested in building my own linear power supply rather than purchasing one. So based on that do you have any reference material.
I am looking for a good introductory text that will walk me through the theory and design of power supplies and regulators. I am really looking to understand things like buck converters and linear regulators. I've looked around wikipedia and while the material is helpful I'd like something that...
I am trying to get an understanding of what a good signal to noise ratio in terms of decibels. My SNR is roughly 20 dB, and am concerned about being able to resolve the signal from this.