Can an MSP430 Handle 1MSPS 16-Bit Sampling for Five Channels?

[dmorris619]

I am having a bit of a sampling rate problem in terms of choosing a microprocessor for the project I am working on. Where everything stands right now is that my sampling rate needs to be 1MSPS at a resolution of 16 bits for approximately 8 milli seconds. I need to sample five channels simultaneously and store the values in memory until they can be offloaded to a non-volatile memory source after sampling is done. I know there are analog to digital converters that sample at 1MSPS at 16 bits resolution, my problem really lies in clocking that data off the ADC fast enough to store it some temporary volatile memory and this problems gets made worse by having to clock all five channels out before the next sample.

Part of my requirements as well is that it be low power so it has to be a microprocessor, I was hoping to find something really low power like an MSP430. I just do not think it has the power to read the data off that quickly. However I can use multiple microprocessors to handle a single ADC, provided they all sample in phase with one another.

Any suggestions would be greatly appreciated and I am open to very inventive solutions.

 

[Fish4Fun]

Assuming you are using a parallel ADC, why not simply use FIFO memory that is 16-18 bits wide? It is cheap, easy, low power and comes in speed grades from a few Mhz to more than 100mhz.

Fish

 

[dmorris619]

Assuming you are using a parallel ADC, why not simply use FIFO memory that is 16-18 bits wide? It is cheap, easy, low power and comes in speed grades from a few Mhz to more than 100mhz.

Fish

That definitely sounds like a possibility. Assuming my ADC can clock out the data at a rate similar to the FIFO memory and both are above the master clock rate of my MSP430, say 16MHz, could I in practice shift out the data from the ADC to the FIFO at a rate of 16Mhz? Is there some limitation of the MSP430 or something else that would limit this?

 

[Fish4Fun]

The biggest problem I see is that most 16 bit ADCs with "multiple channels" only contain a single ADC and simply switch the inputs to the ADC, which precludes taking "simultaneous" readings. I see several ways around this, but they can get expensive. In your OP, you suggested you needed 1MSPS for 8mS (8000 samples per channel, 40k total samples, 80kb of data). You could obviously achieve this with five ADCs operating @ 1MSPS and five FIFOs > 8k x 16. You could use five ADCs @ 1MSPS and a single FIFO >40k x 16 and simply "Mux" the data in. You could use a single ADC > 5MSPS and switch the Analog Inputs to take five samples XnS apart.

5 channel, 16 bit resolution @ 1MSPS for 8mS is a lot of data and can be tricky to pull off. The additional caveat of "low power" makes the design that much more difficult. Since you do not intend to use the on chip ADCs in the MSP430, you might consider different uControllers, or perhaps even an FPGA. An FPGA could be synthesized to act as both FIFO and uController.

Thinking more on it, I think an FPGA might be the best route to go. If this is a "one off" project, you might consider simply buying an "FPGA Eval/Demo Board" and "plugging it into" your analog board.

Just trying to "think".

Fish