Recent content by terranpro

Somewhere along the line (I prefer the beginning) you need to notice the 30ohm resistor is shorted and has nothing to do with your circuit. Visually, using your step 3, you can imagine the current exiting the 5Ohm taking the path of least resistance (the short circuit wire) and flowing through...

The idea is exactly the same as the 3-8 from two 2-4 case. Do you understand what you did, why you did it, and why it works? Start by drawing a simplified truth table for a 4-16 decoder (forget about enable) S3 S2 S1 S0 | "ON" Output ^^^^^^^^^^^^^^^^^^^^^^^^^^^ 0 0 0 0 | F0 0 0...

Could you post a screenshot / printout of your OrCAD schematic? I found your IRF150 under PWRMOS and the simulation worked fine for me. One thing to note, are you sure your pmos bulk is correctly connected to vdd? For me, the part initially is 'upside down' according to how I usually layout...

Sounds like you didn't set an initial condition for one of your gate voltages... I tried a simulation in both multisim and cadence orcad w/pspice. For OrCAD, choose the part "IC1" from the SPECIAL menu then enter an initial voltage (I used 0V). Connect this to any gate input of your inverters -...