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Hello all,
I have a question on z-transforms.The question states
"determine the casual signal x(n) having the z-transform
X(z) = 1/(1-2z^-1)(1 - z^-1)^2".
This is how i tried
If i solve this by...
hello johndoe,
yes the current divides between the three resistor and does not involve the rightmost resistor as no current flows because of open circuit.
And your Rth looks correct to me
I read in a book that perfect integration using inverting op-amp is possible only when the time constant of the circuit(R1Cf) is lesser than the time period of the input signal.
I have trouble in understanding this concept.
Lets assume i give a square wave as input at the inverting terminal.Now...
I thought about it but i felt it will not fit into homework questionS category.Sorry for the mistake.
Its not 'breakdown' as i had mentioned.Its 'breakover'.sorry
thank you for replying.so the op-amp will draw some bias current(due to indvidual transistors ) and the offset current will add to this current when the transistors are mismatched.am i right?
1.My text says 'most of the op-amps use differential amplifier as the input stage.The two transistors must be biased correctly.But it is not possible to get exact matching of two transistors.Thus the input terminals which are the base terminals of the transistors do conduct small dc current'.
I...
iam not saying an op-amp shud go into an oscillation supernova.i have trouble in understanding how it maintains the exact (slightly less than exact input) input when connected as a voltage follower.
i have problem in understanding the basics of op-amp
let's consider an opamp as voltage follower (i.e) the output is connected to inverting terminal directly and if V1(say 3v) is applied as input voltage ,to the non-inverting terminal, the output gets saturated immediately +v-cc(power...
thx for ur reply dude.so if j and k r made 1 and clock pulse is given then the the output depends upon the feedback from the previous outputs.
if the previous state is set r reset then the present state is reset r set respectively and this continues r otherwise toggles.is this right?
if so...
The LATCH CIRCUITS use enabling inputs and these latch circuits are called flip flops when the enabling inputs r connected to pulse detectors thereby making the circuit to respond only at the transtion of enabling inuts called as clock pulses. IS THIS RIGHT?
THEY say that the invalid state...
wat is meant by the clock pulse given to the flip flops in digital circuits.
Is it just a supply that is given to the ic as long as it is held in on position.
How do some chips operate when the clock goes from high to low and not when pulses go from low to high?.