Energy in capacitor at steady state

[Krushnaraj Pandya]

Homework Statement

In the circuit shown, C1= 1 microfarad, C2=3 microfarad, in steady state, the energy stored in these capacitors are?

Homework Equations

Kirchoff's laws, E=0.5CV^2, V=IR

The Attempt at a Solution

At steady state, no current passes through the capacitors, so current is isolated in upper and lower loops- Using KVL in them I(upper)=1 Ampere and I(lower)=0.5 Ampere, Then using KVL in loops with both capacitors gives 8+V1+V2=0 where V1,V2 are potential across capacitors. I don't know how to proceed further, I'd be grateful for your help- thank you.

 

[gneill]

So effectively you have 8 V across two capacitors that are in series...

 

[Krushnaraj Pandya]

So effectively you have 8 V across two capacitors that are in series...

the same current isn't flowing through them, in fact no current is flowing through them at all- how can we say they're in series?

 

[Krushnaraj Pandya]

So effectively you have 8 V across two capacitors that are in series...

I did get the correct answers using that assumption...so now the only thing I want to understand is how we can consider them in series

 

[gneill]

the same current isn't flowing through them, in fact no current is flowing through them at all- how can we say they're in series?

I did get the correct answers using that assumption...so now the only thing I want to understand is how we can consider them in series

Note that I said "effectively". By your own KVL you wrote: 8+V1+V2=0. That can be interpreted as effectively a series connection.

 

[Krushnaraj Pandya]

Note that I said "effectively". By your own KVL you wrote: 8+V1+V2=0. That can be interpreted as effectively a series connection.

I don't think I grasped it, so any loop we take in KVL, we can assume all the capacitors along the way to be in series?

 

[gneill]

I don't think I grasped it, so any loop we take in KVL, we can assume all the capacitors along the way to be in series?

I wouldn't go that far. But writing KVL at steady state you're just looking at fixed potential changes with no current flowing.

Also, if you look carefully at the circuit, you'll note that the currents through the capacitors must be the same at all times. Any current that wants to get to the bottom loop via one capacitor must return to the top loop via the other, and vice versa.

 

[Krushnaraj Pandya]

But writing KVL at steady state you're just looking at fixed potential changes with no current flowing.

What about the current flowing through the parts of the loop besides the capacitor branches? They aren't fixed potential changes.

Also, if you look carefully at the circuit, you'll note that the currents through the capacitors must be the same at all times. Any current that wants to get to the bottom loop via one capacitor must return to the top loop via the other, and vice versa.

Ah! that's very reasonable and intuitive, Thank you.

 

[gneill]

What about the current flowing through the parts of the loop besides the capacitor branches? They aren't fixed potential changes.

At steady state they will be. The currents in the upper and lower loops will be isolated and fixed.

 

[Krushnaraj Pandya]

At steady state they will be. The currents in the upper and lower loops will be isolated and fixed.

Alright, I understand, Thank you very much for your help :D

 

[gneill]

You're welcome.