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Turning JKFF flip-flop into DFF

1. The problem statement, all variables and given/known data
I'm asked to turn JFKK to DFF. I am always puzzled by such problems. I decided to take it step by step and first draw the truth charts and black-boxes for each:

I can see that in order to turn JKFF truth table to DFF, in line to I need it to be 00. But even if I attach NOT gate to K, then the first line no longer matches DFF truth table. I started looking at logic gates, but it appears no matter which change I make in one line I can't get all my lines to correspond. Can I get any hints?

Another question I have is, am I only allowed to attach logic gates to J or K in such exercises, or can I do crazier things like attaching J to K?

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 If you attach not gate to K (from J input) only 2nd and 3rd lines from JKFF truth table will be possible states. Thus your DFF will work as expected. BTW, the 1st line of JKFF is wrong. It will be 0 0 Q Q' The 1st and 2nd lines of DFF will be 0 0 Q Q' and 0 1 Q Q'

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 Quote by Femme_physics I can see that in order to turn JKFF truth table to DFF, in line to I need it to be 00. But even if I attach NOT gate to K, then the first line no longer matches DFF truth table. I started looking at logic gates, but it appears no matter which change I make in one line I can't get all my lines to correspond. Can I get any hints?
Create a new table.
Then 2 columns for J and K. Leave them empty for now.
And then a column for the expected output Q and fill that in too.

Now how do you need to fill in the columns for J and K to get the output Q?

If you have that, you can make a logic circuit to get J from CLK and D, and also one to get K from CLK and D.

 Another question I have is, am I only allowed to attach logic gates to J or K in such exercises, or can I do crazier things like attaching J to K?
I like crazy.

Turning JKFF flip-flop into DFF

If I may interrupt... With the given truth tables the discussion would be right. But maybe the D-FF is supposed to be edge-triggered, and it is precisely the edge-triggering logic that the OP is being asked to implement. Maybe.

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 Quote by Dodo If I may interrupt... With the given truth tables the discussion would be right. But maybe the D-FF is supposed to be edge-triggered, and it is precisely the edge-triggering logic that the OP is being asked to implement. Maybe.
Good point.
I didn't really think about that.

Still, I think the method will still work if we interpret each value for CLK in the table as being different from the one before.

 The JK flip flop is a clocked device. Look up the 7476 for example. The problem is a lot easier if you assume this.
 Recognitions: Gold Member I was told to do this by my teacher: But after getting home I try to look into the logic of it. Does it mean J and K always get the same signal? I was trying to put it in a truth table but wasn't sure how

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 Quote by Femme_physics Does it mean J and K always get the same signal?
Yes.

 I was trying to put it in a truth table but wasn't sure how
If J and K are always the same, which possibilities do you have for the combination of J and K?

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 Quote by Femme_physics 00 and 11 so 00 = No change 11 = Flips values
Yep.

 Same as DFF
There is no input to DFF that flips Q.
So this is not the solution to your problem.

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 Quote by Femme_physics Are you telling me my teacher was wrong?
I do not know what your teacher told you or what he meant.

Apparently he told you to connect the J and K inputs, which is something you can do.
However, it does not generally turn JFKK into DFF.
You need more to do something like that.

 Recognitions: Homework Help I just looked up JK flipflop and realized that it has a 3rd input: the clock pulse. Both JF and D flipflops only change state on a clock pulse trigger. It means you can ignore the clock pulse trigger and look only at the D-input. You need to turn the D-input into J and F inputs. So you need a truth table with only D-input, show intermediary J and K inputs, and end up with a Q-output. It means a slight tweak to the solution your teacher gave you.

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ILS -- can you confirm this?

 Quote by Kholdstare BTW, the 1st line of JKFF is wrong. It will be 0 0 Q Q' The 1st and 2nd lines of DFF will be 0 0 Q Q' and 0 1 Q Q'
...and as far as what you said:...

 You need to turn the D-input into J and F inputs.
Don't you mean the other way around? After all, I'm turning JKFF to DFF.

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Quote by Femme_physics
ILS -- can you confirm this?
 Quote by Kholdstare If you attach not gate to K (from J input) only 2nd and 3rd lines from JKFF truth table will be possible states. Thus your DFF will work as expected. BTW, the 1st line of JKFF is wrong. It will be 0 0 Q Q' The 1st and 2nd lines of DFF will be 0 0 Q Q' and 0 1 Q Q'
What Kholdstare says is the same as what you already have.
I think he misinterpreted the NC entries.

For instance, he meant that the 1st line of JFKK should be ##0\ 0\ Q\ \overline{Q}##.
But this is the same as ##0\ 0\ NC\ NC##.

 ...and as far as what you said:... Don't you mean the other way around? After all, I'm turning JKFF to DFF.
I'm interpreting this that you try to build a DFF from a JKFF flipflop.
That is, you get a D-input, try to connect it to a JKFF somehow, and try to get the related DFF output.
Did you mean it differently?

 the value of clk doesn't generally get included in a truth table, because the operation of a clocked flip flop is not dependent on its value, rather on its edge. a truth table for a clocked device is generally supposed to be interpreted as "what happens when you get a triggering edge on clk" those two images are easier to work from, and you can see that the D output matches the jk output for two specific cases, D = 1 matches J = 1,K = 0, and D = 0 matches J = 0, K = 1. with that information, can you see the combinational logic circuit required to take D as input, and J, K as output? edit: just noticed that clk is included in the t-tables i posted, despite me saying that they shouldn't be there. all that entry is showing is that this is only valid for a rising edge on clk, and since they all have it, the conclusion is that without a rising edge nothing happens...

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 Quote by earlofwessex the value of clk doesn't generally get included in a truth table, because the operation of a clocked flip flop is not dependent on its value, rather on its edge. a truth table for a clocked device is generally supposed to be interpreted as "what happens when you get a triggering edge on clk" those two images are easier to work from, and you can see that the D output matches the jk output for two specific cases, D = 1 matches J = 1,K = 0, and D = 0 matches J = 0, K = 1. with that information, can you see the combinational logic circuit required to take D as input, and J, K as output? edit: just noticed that clk is included in the t-tables i posted, despite me saying that they shouldn't be there. all that entry is showing is that this is only valid for a rising edge on clk, and since they all have it, the conclusion is that without a rising edge nothing happens...
Oh, yes! I think I finally get the picture here: