Recent content by tdotengineer

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    2NOR gate rise and fall time question

    yes i believe so. I will have to think about it a little since my term test is today , but yes there was a typo, as mobility goes down the delay goes up! yes i apologize, i was probably not clear enough. I'll that in mind for the future. Off to school now!
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    2NOR gate rise and fall time question

    hmm I am not sure about gain. I know the capacitance varies over process because its related to the W/L's of the transistors also the oxide capacitance. as for temperature i know its related to the mobility, meaning as temperature goes up mobility goes down and as mobility goes down the...
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    2NOR gate rise and fall time question

    hmm, as for this course we don't deal with slew rate (not for now atleast), mostly rise and fall times basically t(rise or fall)=1.2 Req.C aproximations but looking up slew rate (wasnt sure what it exactly is) looks like it deals with saturation current and capacitance and gain (which I am...
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    2NOR gate rise and fall time question

    oh sorry, this should do: nevermind the vdd value. Also please assume minimum transistor sizes (not stated in the question.. maybe I am wrong about assuming that)
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    2NOR gate rise and fall time question

    Homework Statement True or false: a two input nor gate is designed to have the same worst case rise and fall times. The best case fall time is smaller than the best case rise time in this gate. Homework Equations - The Attempt at a Solution The second part i get, the best case fall...
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    Determining transistor sizes equal to a single inverter

    Guys i think I've got it but I am not sure the question said WORST CASE... i was basically missing that part. so now that I've read it carefully I've found out (with working backwards on the solutions) that using the worst case scenario (slowest timing aka lowest equivalent W/L for PDN or PUN...
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    Determining transistor sizes equal to a single inverter

    Homework Statement Determine transistor sizes for (lets say a 2 input nand gate, my actual question is more complicated but i want to know the basic idea so i can do it myself) so that the worst case pull down and pull up is equivalent to a single inverter with Wn = 1 micro m and Wp= 2 Micro...
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    What is an Electrical Net? - Simulation Tools Explained

    well I am using Ansoft SIwave simulation tool, on a graphics board, bunch of traces, vias etc. so a net is basically the set of points at the same voltage i assume? EDIT- and thanks for the help!
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    What is an Electrical Net? - Simulation Tools Explained

    Hey guys I am using some simulation tools and wondering what is an electrical net? google didnt help:D
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