Recent content by yefj

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    Properly producing TDR on PNA network analyzer N5224B

    Hello baluncore,few questions: 1.What is the math for 0.5V , with ρ = 0, at Zo. 2.The velocity factor is set to 1, marker 3 is at 4.86ns so the length is 0.7m. but its the wrong result becuase the length of the cable of port 1 is 0.3m(approximatly) How do I find the velocity factor of the...
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    Understanding the fixture deembeding method being reccomended

    Hello, there are many fixture removing methods . I got this keysight support answer for my N5224B PNA. I know there is 2X method, 1x Reflect Method. What method did he meant in his explanation? Thanks. ********************** Please follow the following link to our help files Manual...
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    Properly producing TDR on PNA network analyzer N5224B

    Hello Baluncore,few questions: 1.why making pulse rise time shorter make tdr better? 2.I have transformed into time domain step responce.Is it more logical now given that port 1 cable has nothing connected to it? 3.I have shown in the photos below the Y-axes settings and how the markers look at...
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    Properly producing TDR on PNA network analyzer N5224B

    hello balun core_I have attached the tdr in linear scale few questions: 1.what is meaning of the y axes? for example marker 2 of the photo we have is 4.22ns and yaxes 567mu what is "mu"? 2. I saw in other manuals the keiser coeffient shownin the photos.What theoretically is the best way to get...
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    Properly producing TDR on PNA network analyzer N5224B

    Hello , lets take a simpler case, I have an open on the end of the cable so reflection is -1. so the reflected signal cacels the original one after a round trip. T(2*L/V) I expect the see a TDR ash shoqwn below. but in reality ash you can see in the TDR I got its totally different. also I...
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    Properly producing TDR on PNA network analyzer N5224B

    Hello, my pna port1 is connected to a resonator. the resonator is connected to pna threw a good line 30cm long. I made S11 of 10Mhz to 40Ghz and converted to time domain(probably pna doing ifft) as you can see in the photos. the time resopnce is very bad. There is a menu I have to the time...
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    Resonance definition through dip in S-parameters

    Hello baluncore , from reading at the following link resonance is a situation when we have standing waves. is this what happens here? the reflected wave cancels the incoming wave at port 2 so why its a standing wave situation? Thanks...
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    Resonance definition through dip in S-parameters

    The basic definition of resonance is "energy trapped within a cavity and it going from electric to magnetic type" So whenrgy is trapped in a covity and doesnt go back thats why I understand we have a DIP in S11 of one port resonator. but how can we understand the dip of S21 using same "trapped...
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    Resonance definition through dip in S-parameters

    Hello , I see things from Electro magnetic point of view thats why I said that energy is traped and goes from electric to magnetic withing the stucture. I am use to see resosnace as a dip in S11 why in the phot the say that resonance in a dip in S21? Thanks.
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    Extracting capacitance and inductance from s-parameters

    Hello , Yes I understand that its on a very narrow BW. In CST EM simulator I have found two ways to convert S-parameters as shown below in the photos. which method of the two presented do you think I should use to match what the book written as equivalent L and C of the VIA?
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    Extracting capacitance and inductance from s-parameters

    Hello , In this page from they book they say that we can extract capacitance and inductance from EM simulator. I have CST simulator I can build a two port PCB and make simulation and extract S-params from the simulation. How do I convert the capacitance and inductance from the S-params they talk...
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    Interpreting VIA PCB through TDR and TDT

    I am trying to simulate time domain reflectometry and recognise threw the pulse responce if the load is capacitative or inductive. As you can see its not working . Where did I go wrong with the concept. what is the proper way to see threw the time responce if the load is capacitative or inductive?
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    Interpreting VIA PCB through TDR and TDT

    Yes sorry for the mistake. Sorry for the stupid question but I know that I can get reflection coeffient threw the TDR by the formula below . but how can I know that out ZL is inductive or capacitative? Zc=1/jwc ZL=jwl these formulas dont help me understand this in the wiki link you posted.
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    Interpreting VIA PCB through TDR and TDT

    Hello,can you give me some manual regarding how to mathemtickally we prove that the reflection is capacitative or iductive?
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    Interpreting VIA PCB through TDR and TDT

    Hello , Yes I know what TDR is I need to know how to interpret its capacitance inductance. parts. how do i do that? can I see VIA structure properties threw the peaks of the TDT and TDR?