Extracting capacitance and inductance from s-parameters

[yefj]

Hello , In this page from they book they say that we can extract capacitance and inductance from EM simulator.
I have CST simulator I can build a two port PCB and make simulation and extract S-params from the simulation.
How do I convert the capacitance and inductance from the S-params they talk about in the book?
Thanks

 

[berkeman]

As explained by @Baluncore in your previous thread, the correct model involves 3 different transmission line impedances in series. Are you saying you want to model those 3 TLs with equivalent distributed RLC segments?

This LTspice model is sufficient to model the signal passing through a via.
T1 is the line on one side of the PCB. T2 will become the via, if it is shortened. T3 is the line on the opposite side of the PCB. Values that are unusual are marked with an asterisk, so they will not be missed or forgotten.
View attachment 370693
This is the TDR response due to the T2 (via) impedance and the capacitive termination.
View attachment 370692
The green shows the driver pulse, the yellow the TD reflected signal, and the red the destination signal. TDR times are twice the transit times.

Notice how T2, the higher impedance line, shows as a higher voltage.
Notice how the capacitive load shows as a downward pulse, series inductance would make a positive pulse.
Notice the final output voltage settles to slightly greater than 0.5V, because the termination resistance is greater than 50R.

Following the capacitive pulse in the TDR, are secondary echos of the capacitive pulse in both end mismatches of T2, first positive, then negative. Change Zo of T2 to say 40R, so the T2 voltage will step down, and see those two echos invert.

This model shows how TDR can look down a line at impedance discontinuities, and how the reflection can be interpreted. That will give you an understanding of TDR. To model a real via using this schematic, you will need to significantly shorten the length of T2, and greatly reduce the rise time of the test pulse. Short TLs, and fast rise-times, will slow down the simulation.

The two text files are the source LTspice files, wrapped so they can be attached to this thread, then downloaded and run.

 

[Baluncore]

How do I convert the capacitance and inductance from the S-params they talk about in the book?

If you are designing a PCB for operation over a narrowband, then your S-parameters will be for frequencies specified on both the low and the high sides of the pass-band employed. You will probably also generate S-parameters for a mid-band frequency, probably the geometric mean of the low and high sides. The numerical S-parameters, extracted from modelling software are really only applicable to narrowband systems.

The tracks on a PCB, and any vias that connect them, make a broad-band matched transmission line structure. A digital signal is a broad-band signal, analysed as a fundamental with many harmonics. That broad-band response cannot be modelled using only a handful of numerical S-parameters.

Given the S-parameters at a single frequency, you can design a network that has lumped values of L and C for that frequency. Those lumped values will be different at every different frequency. The length and time delay of any transmission lines will be lost in those S-parameter phasors, as the phase component is reduced to modulo 2π. At each single frequency, each transmission line will appear to be a tuned lumped equivalent, without any understanding of the signal delays and the multiple reflections expected in a broad-band transmission line system.

So, narrowband systems, maybe ±10% either side of the centre frequency, can be modelled using S-parameters. Broad-band systems, DC to daylight, or maybe +1000% for the tenth harmonic, will need to be modelled using transmission line models, as I demonstrated earlier in LTspice.

 

[yefj]

Hello , Yes I understand that its on a very narrow BW.
In CST EM simulator I have found two ways to convert S-parameters as shown below in the photos.
which method of the two presented do you think I should use to match what the book written as equivalent L and C of the VIA?