How Does Increasing Bus Frequency Affect Data Transfer and Ohm's Law?

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SUMMARY

Increasing the frequency of a computer's main bus directly enhances data transfer rates by allowing more bits to be transmitted per second. For instance, transitioning from 200 MHz to 250 MHz results in a higher number of voltage cycles, which translates to increased data throughput. This phenomenon does not violate Ohm's Law; rather, it relies on the relationship between current, voltage, and frequency, where higher frequencies necessitate greater current to drive the bus capacitance. Understanding these principles is crucial for optimizing system performance, especially during overclocking scenarios.

PREREQUISITES
  • Understanding of digital signal representation and waveform characteristics
  • Familiarity with Ohm's Law and its application in electrical circuits
  • Knowledge of bus architecture and data transfer mechanisms in computing
  • Basic principles of overclocking and its effects on CPU performance
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  • Research "Capacitance and its role in high-frequency bus design"
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This discussion is beneficial for electrical engineers, computer hardware enthusiasts, and anyone involved in optimizing CPU performance and understanding digital signal dynamics.

Brown399
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What does increasing the frequency of a computers main bus [the bus that connects the CPU to the chipset] imply about the voltage ["information"] traveling on a bus? (what IS the frequency of a bus effectively measuring, data units per second?)

The way i see it (please correct me if I'm wrong, which i will presume i am), increasing the number of 'ups and downs' in any given second will result in more voltage going through the bus (which means more will be denoted a logical 0 or 1, so effectively more data is passing through the bus).

If it was 2 cycles per second, and was increased to 4 per second, would that not imply that more voltage passes through the bus?

And if this is implied ( that more voltage passes through the bus at any given second) how can this be, without violation Ohms law...? How can a change in frequency change the amount of data per second that can be processed in any given second (I'm talking about overclocking, increasing a processor from 3.6->4.0ghz for example)? How can this be explained by physics without breaking fundamental laws (i presume this is because frequency has a more complex nature than the basics of Ohms law).
 
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Brown399 said:
What does increasing the frequency of a computers main bus [the bus that connects the CPU to the chipset] imply about the voltage ["information"] traveling on a bus? (what IS the frequency of a bus effectively measuring, data units per second?)

The way i see it (please correct me if I'm wrong, which i will presume i am), increasing the number of 'ups and downs' in any given second will result in more voltage going through the bus (which means more will be denoted a logical 0 or 1, so effectively more data is passing through the bus).

If it was 2 cycles per second, and was increased to 4 per second, would that not imply that more voltage passes through the bus?

And if this is implied ( that more voltage passes through the bus at any given second) how can this be, without violation Ohms law...? How can a change in frequency change the amount of data per second that can be processed in any given second (I'm talking about overclocking, increasing a processor from 3.6->4.0ghz for example)? How can this be explained by physics without breaking fundamental laws (i presume this is because frequency has a more complex nature than the basics of Ohms law).

It's best not to say "voltage through". Voltage is a potential difference across something, and that voltage difference causes current to flow through the thing.

Increasing the clock frequency of a bus indeed allows more data to pass through the bus per second. Since the data in a digital system consists of rectangular waveforms, there is a lot of harmonic content in the signals. Even if you only have a bus operating at 10MHz, the edges of the waveforms will be in the few nanosecond range, which means that the signal harmonic bandwidth goes up to about 0.35/rise time, or a few hundred MHz. This can cause signal integrity issues if the bus length gets to be longer than about 1/10 of a wavelength for the highest harmonics. Once you get to high enough frequencies, you need to treat the bus like a transmission line, and be sure to properly terminate it.
 
berkeman said:
Increasing the clock frequency of a bus indeed allows more data to pass through the bus per second.

Data is represented by voltage in a computer, and therefor for more data to transfer through the same bus, more CURRENT (v/r) has to flow through that bus.

I've increased my processor about .7GHz, how is this possible without violating Ohms law?

I = V/RSilicon is has a constant resistance, so that obviously cannot reduce in magnitude and result in more current flow.

That only leaves voltage.

When i increased the frequency of my bus to 250 from 200mhz, the number of up-down cycles was increased. How does this increased frequency actually allow more data to transfer from the north bridge (on the main bus) to the CPU?
 
Last edited:
Brown399 said:
Data is represented by voltage in a computer, and therefor for more data to transfer through the same bus, more CURRENT (v/r) has to flow through that bus.

I've increased my processor about .7GHz, how is this possible without violating Ohms law?

I = V/R


Silicon is has a constant resistance, so that obviously cannot reduce in magnitude and result in more current flow.

That only leaves voltage.

When i increased the frequency of my bus to 250 from 200mhz, the number of up-down cycles was increased. How does this increased frequency actually allow more data to transfer from the north bridge (on the main bus) to the CPU?

The digital signals drive basically rail-to-rail, so there is trivial voltage drop across the resistance of the bus traces. You are really mostly driving the capacitance of the bus (formed between the traces and the inner layer ground plane beneath them).

As you drive to higher frequencies, it takes more power, because I ~ CVf (Capacitance * Voltage swing * frequency). The current pulses take place when you change the voltage on a bus trace, either high-->low or low-->high. Holding the trace high or low takes very little current.

Hope that helps to clear up your doubt. You can read more about the basics of computers and digital signals at HowStuffWorks.com
 
Brown399 said:
When i increased the frequency of my bus to 250 from 200mhz, the number of up-down cycles was increased. How does this increased frequency actually allow more data to transfer from the north bridge (on the main bus) to the CPU?

Bits of information are transferred at the system clock rate. If you increase the system clock rate, you increase the number of bits transferred per second. So you can read variables from RAM at a faster rate, for example.
 

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