DC-Link Capacitor Current Modeling for a Voltage Source Inverter

AI Thread Summary
The discussion focuses on understanding the modeling of DC-link capacitor current in voltage source inverters. Key points include the significance of the values in brackets after voltage vectors, which indicate their contribution to the RMS current in the middle wire, influenced by the duration of each vector's application in the Space Vector Modulation (SVM) scheme. Clarifications are sought regarding the conditions for certain figures and the mathematical transitions in equations related to modulation indices. The responses highlight that the contributions depend on the specific SVM strategy and switching time calculations. Overall, the conversation aims to clarify complex aspects of current modeling in voltage source inverters.
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Hello I'm reading this research paper about obtaining an accurate DC-link capacitor current equation. I've attached the paper.
Im struggling to understand a few things and was hoping someone could help with them.
1) How is the the value marked in the bracket after each V vector describing the contribution of this vector to the RMS current in the middle wire of the dc-link decided
2) It shows that Figure 3.c) is when ma <= 1, but wouldn't that case be when the arc is touching V7.
3) After substituting equations (9) and (14) into (15) to obtain (16), how does Ta/Ts and Tc/Ts go away and ma get in the equation.
 

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The value in the bracket after each voltage vector likely represents a factor related to how long that specific vector is applied during a switching cycle within a particular Space Vector Modulation (SVM) scheme. This duration influences the contribution of that vector to the average current in the middle wire over that cycle. Vectors that connect to the neutral point or involve switching states that directly impact the current flow through the middle wire will have non-zero contributions. The exact values depend on the specific SVM strategy being used (e.g., centered PWM, edge-aligned PWM) and how the switching times are calculated to synthesize the desired output voltage vector.

Thanks
Pawan
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