I am reading Analysis and Design of Analog ICs by Gray and Meyer. In Ch. 2, they describe using MOS technology for fabricating on-chip capacitors. First and foremost, what exactly does surface potential mean in the context of semiconductors? Quoted from Gray and Meyer (5e), Page 149: Because the plates of the capacitor are a heavily doped semiconductor rather than an ideal conductor, some variation in surface potential relative to the bulk material of the plate occurs as voltage is applied to the capacitor. This effect is analogous to the variation in surface potential that occurs in an MOS transistor when a voltage is applied to the gate. However, since the impurity concentration in the plate is usually relatively high, the variations in surface potential are small. The result of these surface potential variations is a slight variation in capacitance with applied voltage. So, how does surface potential depend on doping? I just can't picture what's happening in the semiconductor itself. P.S. Please no equations (unless absolutely necessary) because I want to develop intuition.