What is the cause of Verilog error message 10159 in my binary calculator code?

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The Verilog error message 10159 arises from incorrect instantiation of the "Display" module in the binary calculator code. The correct syntax requires naming the instance of the module, such as "Display Display_Instance1 (SW[15:8], HEX6);". The user initially attempted to call the module within an "always" block, which caused the error. After removing the call from the "always" block, the issue was resolved. The discussion highlights the importance of proper module instantiation in Verilog coding.
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I'm currently working on a project to create a binary calculator using verilog, which I will eventually program onto a DE2 FPGA board. I am trying to wrte my code but I keep getting the following error message.
"Error (10159): Verilog HDL error at calculator.v(37): "Display" is not a task or void function"

I have never seen this before. The following is part of my code where this happens

Code:
always @(*)begin


if(KEY[0] == 0 && KEY[0] != 1) //if addittion button
    
    result = SW[15:8] + SW[7:0];  //addition for the 2 numbers     


    Display (SW[15:8], HEX6);  <--- error occurs here

this is my module that I'm calling

Code:
module Display(num, hex);


input [7:0] num; //8-bit input
    output reg [6:0] hex; //7-segment display
    
    always@(num) begin


case(num)                                            
            
            0: hex =  7'b1000000;
            1: hex =  7'b1111001;
            2: hex =  7'b0100100;
            3: hex =  7'b0110000;
            4: hex =  7'b0011001;
            5: hex =  7'b0010010;
            6: hex =  7'b0000010;
            7: hex =  7'b1111000;
            8: hex =  7'b0000000;
            9: hex =  7'b0010000;
            10: hex = 7'b0001000;
            11: hex = 7'b0000011; //B
           12: hex = 7'b1000110; //C
           13: hex = 7'b0100001; //D
            14: hex = 7'b0000110; //E
            15: hex = 7'b0001110; //F
                default: hex = 7'b1000000;
          endcase
        end
    
endmodule


I'm not sure if this is the right forum to post this question but any advice would be appreciated.
 
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You are getting the error because you are not instantiating the module "Display" correctly in your top level. It should be:
Display Name_of_this_Particular_Instance_of_the_Module_Display (SW[15:8], HEX6);

or

Display Display_Instance1 (SW[15:8], HEX6);

Why are you passing SW[15:8] to the display and not the result of the addition?
 
I'm passing one of the inputs because I need to display both the input and output. That's just a piece of the ode like I said. I took the call out of the "always @" and it solved the problem. Thank you for the reply.
 
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