What is the Maximum that a Time Base can be Divided ?

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JD1
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what am i doing if I am getting double the amount bandwidths from a time base ?

Hia

So here i have a clock frequency be divided and i have achieved to divide it in such a way that out of let's say,( keep it simple eh, ) 1KHz, if i divide this by 10, i would get 10 sequential parallel outputs at 100Hz each, but i have achieved to get 20 sequential parallel outputs of 100Hz,

thankyou
 
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JD1 said:
Hia

So here i have a clock frequency be divided and i have achieved to divide it in such a way that out of let's say,( keep it simple eh, ) 1KHz, if i divide this by 10, i would get 10 sequential parallel outputs at 100Hz each, but i have achieved to get 20 sequential parallel outputs of 100Hz,

thankyou

Show us your code so we can see what you did.
 
Thats just it, i haven't yet put it into code, i designed it on Multisim see, now I'm looking at using FPGA's to put it in, any ideas on 2 things..

whats the best and easiest FPGA kit to get ?

takin into consideration that I've just taken Time Division to a point whereby it cannot be divided any more according to the laws of Division, what do i call this ?

regards

derrick
 
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