What is the $@ symbol for in a makefile?

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The $@ symbol in a Makefile represents the target name of the rule, specifically the name of the file that is generated by the rule. In the provided example, it is used in the command `ifort $(LOADFLAGS) -o $@ $(OBJECTS) $(LIBRARIES)`, where $@ expands to the name of the executable defined by the target `$(EXECUTABLE)`. This automatic variable is essential for correctly specifying output files in build processes using GNU Make.

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jf22901
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Hi.

Can anyone please tell me what purpose $@ serves in the dependency line below? I've tried looking online, and in the make and ifort documentation, but can't find anything. :confused:

Code: 
$(EXECUTABLE) : $(OBJECTS)
                ifort $(LOADFLAGS) -o $@ $(OBJECTS) $(LIBRARIES)

where:

OBJECTS = list of object files
LOADFLAGS = -O3 -align dcommons
LIBRARIES = -L$(LIBRARY) -lfft -lnetcdf

Many thanks. :smile:
 
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