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when an SRAM is power - uped what state do its locations have?

 
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Dec18-12, 04:01 AM   #1
 

when an SRAM is power - uped what state do its locations have?


Hi PF,
I am searching for a good entropy source for random number generation. I want to know if when an SRAM is powered will its all contents be high(1) or low (0) or do it contain random bits unpredictable.

-Devanand T
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Dec18-12, 04:46 AM   #2
 
I think that is up to the manufacturer. However, I do believe that it will be either High or Low. I don't think you will find one where it is random however.
Dec18-12, 09:04 AM   #3
 
Quote by dexterdev View Post
Hi PF,
I am searching for a good entropy source for random number generation. I want to know if when an SRAM is powered will its all contents be high(1) or low (0) or do it contain random bits unpredictable.

-Devanand T
The memory cells are designed to be identical during the manufacturing process but small variations in the process across even a small die will generate a small bias in most cells that will normally cause them to be a 1 or 0 during power-up but usually there is also a sizable number of cells that are close to a state balance that can randomly be a 1 or 0 due to thermal noise or other random events.

http://www.cs.umass.edu/~kevinfu/pap...-Computers.pdf
Dec18-12, 10:08 AM   #4
 

when an SRAM is power - uped what state do its locations have?


Thanks for the reply... :)
Dec18-12, 11:59 AM   #5
 
Something you have to watch out for when looking for random bits in SRAM is the default actions of the software tools. The usual default is to zero all memory in the run-time startup module but most embedded software systems will have a option in the linker not to zero or initialize memory on power up.
Dec18-12, 09:16 PM   #6
 
Thank you for the tip...
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