100 Processors on a Single Chip

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Discussion Overview

The discussion centers around the development of a computer chip featuring 100 processors, as introduced by Agarwal and his team at Tilera. Participants explore the implications of such technology for server efficiency, power savings, and the future of computing. The conversation includes speculative thoughts on potential applications and commercial aspects of the technology.

Discussion Character

  • Exploratory
  • Technical explanation
  • Debate/contested

Main Points Raised

  • Agarwal's research aims to create highly efficient chips by integrating numerous simple cores, potentially enhancing server performance and reducing power consumption.
  • Tilera's 100-core chip is positioned as a significant advancement over current high-end chips, which typically have up to 16 cores.
  • Some participants express interest in the practical applications of such technology, questioning what they might use it for.
  • There is a suggestion of negotiating discounts with vendors for potential purchases of the new technology.
  • Participants express enthusiasm about the idea of clusters of boxes powered by these advanced chips.

Areas of Agreement / Disagreement

Participants generally express excitement about the technology and its potential applications, but there is no consensus on specific use cases or commercial viability. Some discussions hint at uncertainty regarding the cost and practical implementation.

Contextual Notes

Participants have not provided detailed technical specifications or pricing information, leaving some assumptions about the chip's capabilities and market readiness unaddressed.

Who May Find This Useful

Individuals interested in advancements in computer architecture, server technology, and those exploring new computing solutions for data centers may find this discussion relevant.

rhody
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MIT Genius Stuffs 100 Processors Into Single Chip
Agarwal and his colleagues are figuring out how to build the computer chips of the future, looking a decade or two down the road. The aim is to do research that most people think is nuts. “If people say you’re not crazy,” Agarwal tells Wired, “that means you’re not thinking far out enough.”

Agarwal has been at this a while, and periodically, when some of his pie-in-the-sky research becomes merely cutting-edge, he dons his serial entrepreneur hat and launches the technology into the world. His latest commercial venture is Tilera. The company’s specialty is squeezing cores onto chips — lots of cores. A core is a processor, the part of a computer chip that runs software and crunches data. Today’s high-end computer chips have as many as 16 cores. But Tilera’s top-of-the-line chip has 100.

The idea is to make servers more efficient. If you pack lots of simple cores onto a single chip, you’re not only saving power. You’re shortening the distance between cores.

Today, Tilera sells chips with 16, 32, and 64 cores, and it’s scheduled to ship that 100-core monster later this year. Tilera provides these chips to Quanta, the huge Taiwanese original design manufacturer (ODM) that supplies servers to Facebook and — according to reports, Google. Quanta servers sold to the big web companies don’t yet include Tilera chips, as far as anyone is admitting. But the chips are on some of the companies’ radar screens.

Agarwal’s outfit is part of an ever growing movement to reinvent the server for the internet age. Facebook and Google are now designing their own servers for their sweeping online operations. Startups such as SeaMicro are cramming hundreds of mobile processors into servers in an effort to save power in the web data center. And Tilera is tackling this same task from different angle, cramming the processors into a single chip.

Tilera grew out of a DARPA- and NSF-funded MIT project called RAW, which produced a prototype 16-core chip in 2002. The key idea was to combine a processor with a communications switch. Agarwal calls this creation a tile, and he’s able to build these many tiles into a piece of silicon, creating what’s known as a “mesh network.”

“Before that you had the concept of a bunch of processors hanging off of a bus, and a bus tends to be a real bottleneck,” Agarwal says. “With a mesh, every processor gets a switch and they all talk to each other…. You can think of it as a peer-to-peer network.”

Hmm... I want one, then again, what would I use it for.

Rhody...
 
Computer science news on Phys.org
Greg Bernhardt said:
Sign PF up! Now how much does it cost :D
Not sure Greg, are you kidding or serious ? If serious I will dig/drill down for a solution.

Rhody... :wink:
 
I wouldn't mind of cluster of boxes powered by these.
 
jhae2.718 said:
I wouldn't mind of cluster of boxes powered by these.
I will talk to any emerging vendors, maybe I can negotiate a PF discount, lol.

Rhody... :-p
 

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