2n3904/2n3906 driving mosfet gate

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SUMMARY

The forum discussion focuses on designing a MOSFET driver circuit using 2N3904 and 2N3906 transistors to drive an IRF740 MOSFET. The user reports issues with the output signal at the MOSFET gate, indicating a significant drop in voltage due to the use of a 2:1 transformer, which results in insufficient gate drive voltage. Experts recommend using a dedicated MOSFET gate driver to achieve the necessary gate voltage and current for optimal performance, as the current configuration limits the gate drive to below 5V, preventing the MOSFET from fully turning on.

PREREQUISITES
  • Understanding of MOSFET operation and specifications, particularly for the IRF740
  • Familiarity with transistor configurations, specifically push-pull stages using 2N3904 and 2N3906
  • Knowledge of impedance matching techniques and their application in RF circuits
  • Basic principles of gate drive circuits and the importance of gate voltage levels
NEXT STEPS
  • Research dedicated MOSFET gate drivers and their specifications for driving high-capacitance loads
  • Learn about the effects of Miller capacitance in MOSFET gate drive circuits
  • Explore alternative designs for MOSFET drivers that do not rely on transformers for impedance matching
  • Study the thermal management of MOSFETs, particularly in high-power applications like the IRF740
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Electronics engineers, hobbyists designing power electronics, and anyone involved in MOSFET driver circuit design and optimization.

zxcvb
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I'm building a MOSFET driver like this. The signal source is 7V peak-to-peak. Vcc is 12V. The push-pull stage is 2n3904/2n3906.(datasheet http://www.kynix.com/uploadfiles/pdf8798/2N3904.pdf)

I've tested the push-pull output before adding the transformer, and using a 50 ohm load, the output voltage is reduced by half, so I concluded that the output resistance of the push-pull stage is 50 ohm.

Then according to the MOSFET spec (IRF740), C_iss = 1400pF, at 13.5MHz I calculated the impedance to be 8 ohm. So I used a 2:1 transformer (therefore 4:1 impedance transformation) to match the load at the gate.

But now I get a flat signal at the Q3 gate, AC is almost non-existent. If I disconnect the MOSFET Q3, I get a good sine-wave. Can anybody help me find out what's the problem with this circuit?

C2 is a 104 capacitor which is practically a short at RF. The 2n3904 has a spec of peak 200mA current capacity, which I translate to be 2.5V for 1/4 period, which should get doubled by the transformer and is supposed to be enough to charge the gate to a observable voltage.
 
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The Q1-Q2 buffer could drive the gate directly, but through a 4R7 resistor to prevent parasitic oscillation.
I see no advantage in the transformer.
 
I notice Q3 isn't provided with a DC supply, that's okay is it? You have double-checked that you've connected to the correct pins on Q3?
 
nascentoxygen:
The drain is grounded as it is being presented as an AC model.

zxcvb:
Surely you do not intend to drive the IRF740 at greater than about 50kHz.
It requires at least 8 volts of gate drive to conduct 10 amps.
The 2:1 ratio transformer is lowering the drive to only 6V, and that about the ground potential, which is only +/-3V.
I think you need to use a more traditional design for your gate drive circuit to get the full 12V drive to the gate.

1. At what frequency will you drive the gate of the IRF740 ?
2. What drain current will the IRF740 need to sink ?
 
Just curiosity, I am starting to study electronics, I understand the push-pull circuit, but I can't find out the purpose of this circuit, why the transformer and the mosfet? What does this circuit do?
 
Phellippe Marques said:
I can't find out the purpose of this circuit, why the transformer and the mosfet? What does this circuit do?
The mosfet has been shown with the drain grounded as the design is being considered as an AC model. In the real world the mosfet drain would be driving a motor or an inductive load. The grounded drain gives false confidence in the driver since there is no drain voltage change pushing charge back to the gate through the miller capacitance. Cdg is not being modeled.

The design here has a few problems. The OP design is an attempt at driving the gate through an impedance matching network. If this was an RF circuit it would be worth considering, but here the requirement is to charge and discharge the high gate capacitance. Without feedback from the OP we cannot tell what was actually wanted.

The output resistance of the two transistor buffer is much lower than was measured, and swings through a wide voltage range. By using the transformer the gate drive voltage is being halved. That voltage is also symmetrical about ground which keeps the gate drive below +5V. Because of that the mosfet is not being turned fully on. The gate could be driven here by a dedicated mosfet gate driver that could supply 500mA, or directly from the buffer with a 22R series resistor. I would select higher current transistors.

I modeled the OP circuit using LTspice and had to DC bias the transformer secondary to get it working. I also modeled the circuit with a series resistor, without the transformer, it performed the same as when DC biassed.

In both cases the mosfet dissipated about 300W during each transition. Because the IRF740 is an earlier generation design it has a high on resistance, so while conducting it dissipates about 45W at 10A.
 

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