Effect of radiation on microcircuits/chips

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SUMMARY

The discussion focuses on the impact of ionizing radiation on microcircuits, particularly in space and terrestrial systems. It highlights the vulnerability of smaller transistors, such as those in the P5-133 microprocessor, to single event upset (SEU) errors, which can cause bit flips without damaging the hardware. The conversation references the RAD750 and RAD5500 chips, known for their radiation tolerance, and suggests that techniques from astronomy may offer solutions for enhancing quantum processing hardware against radiation effects.

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Astronuc
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Going to smaller transistors with higher density increases sensitivity. This an issue in terrestrial systems as much as it is an issue in space.

I've of issues with microprocessors in space having data issues, or chips like P5-133 having to be reset.

Here are some interesting stories.

Ionizing radiation may cause a single event upset (SEU) error, a type of soft error that doesn't damage the transistor, but does cause a 1 to flip to 0.
 
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Computer science news on Phys.org
https://arstechnica.com/science/202...swamp-error-correction-on-quantum-processors/
So, this is a problem for transmons, and the paper suggests that similar issues could affect other leading technologies. And it's only going to get worse as we build bigger processors in order to boost qubit counts. Can anything be done?

Unfortunately, the paper's authors have to turn to hypotheticals here. They note that astronomers have faced similar problems in designing their imaging hardware and have come up with ways of altering the physical structure of their detector in order to limit the spread of phonons. But it's not clear whether the techniques used there are compatible with quantum processing hardware. But the paper seemingly gives people a very good reason to find out.
https://www.nature.com/articles/s41567-021-01432-8

Resolving catastrophic error bursts from cosmic rays in large arrays of superconducting qubits
 
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Yeah it seems that we may need to recalc something n times and take the answer as the most prominate one as is done in quantum computing for these types of environments.
 
We have a fix.
low_background_metal.png
 
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I'm not sure how they design hardened CPUs these days, but there were a few silicon on sapphire chips in the mid 1970's like RCA's CDP 1802 that were more resistant to radiation (and electrostatic discharge). Low volume and expensive, they were intended for space missions, though it's been a while so I can't recall whether their transistors would still flip 1 to 0 like the OP describes when struck by ionizing radiation.
 
There are several effects, e.g., soft errors in which transistors are flipped but not damaged, and hard errors where damage occurs.

https://en.wikipedia.org/wiki/Single-event_upset

There is a discussion of bit flips, SEEs and causes in the summaries at
https://www.sciencedirect.com/topics/engineering/single-event-upset

"Radiation Effects in Electronic Materials and Devices" in right column has a figure showing bit flips from 0 to 1 and 1 to 0 in a CMOS (see figure with "Effect on Logic").

I remember the development of the RAD750.
https://en.wikipedia.org/wiki/RAD750
https://en.wikipedia.org/wiki/RAD5500
https://en.wikipedia.org/wiki/IBM_RAD6000

Edit/update: https://indico.cern.ch/event/649606.../2401425/introduction-short-Oct1-Gaillard.pdf
 
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In this video (t=19:28) by Veritasium, he says that modern space missions such as Perseverance are still using the PowerPC chip from 2001 because it is more radiation tolerant.

 

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