Help with 16 Bit Program Counter

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SUMMARY

The discussion revolves around building a 16-bit program counter using HDL as part of the project from "The Elements of Computing Systems" by Nisan and Schocken. The provided HDL code outlines the functionality of the counter, which includes load, increment, and reset controls. The user, Paul, encountered issues with the output after time 3, specifically when the load and increment signals were activated. Ultimately, Paul resolved the issue independently, indicating a successful understanding of the program counter's operation.

PREREQUISITES
  • Understanding of HDL (Hardware Description Language)
  • Familiarity with digital logic concepts, particularly counters
  • Knowledge of the operation of multiplexers (Mux16) and registers
  • Basic experience with integer addition in digital circuits
NEXT STEPS
  • Study the implementation of 16-bit counters in various HDL environments
  • Explore the functionality and design of multiplexers (Mux16) in digital circuits
  • Learn about the use of registers in state machines and counters
  • Investigate common debugging techniques for HDL projects
USEFUL FOR

This discussion is beneficial for students and hobbyists interested in digital design, particularly those working on projects involving hardware description languages and digital counters.

cu44
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Hi all,

First a little background. I am reading "The Elements of Computing Systems"
and one project was to build a 16 bit program counter but having a tough time.
I am reading for pleasure not for any course. The following pc hdl file gives me the proper output (listed below pc file) up to time 3+ the gets off track and can not seem to figure it out. Any help/guidance would be greatly appreciated.
Thanks, Paul

// This file is part of the materials accompanying the book
// "The Elements of Computing Systems" by Nisan and Schocken,
// MIT Press. Book site: www.idc.ac.il/tecs
// File name: projects/03/1/PC.hdl

/**
* 16-bit counter with load and reset controls.
*
* If reset(t-1) then out(t) = 0
* else if load(t-1) then out(t) = in(t-1)
* else if inc(t-1) then out(t) = out(t-1) + 1 (integer addition)
* else out(t) = out(t-1)
*/

CHIP PC {

IN in[16], load, inc, reset;
OUT out[16];

PARTS:


Mux16(a=regOut1, b=false, sel=reset, out=rOut);
Mux16(a=rOut, b=in, sel=load, out=regOut);
Register(in=regOut, load=load, out=regOut1);
Inc16(in=iOut1 , out=iOut);
Register(in=iOut, load=inc, out=iOut1);
Mux16(a=regOut, b=iOut1, sel=inc, out=rOut2);
Mux16(a=regOut1, b=iOut1, sel=inc, out=out1);
Mux16(a=out1, b=regOut1, sel=load, out=out);

}

INPUTS AND OUTPUTS AT EACH TIME SEQUENCE

| time | in |reset|load | inc | out |
| 0+ | 0 | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 0 | 0 |
| 1+ | 0 | 0 | 0 | 1 | 0 |
| 2 | 0 | 0 | 0 | 1 | 1 |
| 2+ | -32123 | 0 | 0 | 1 | 1 |
| 3 | -32123 | 0 | 0 | 1 | 2 |
| 3+ | -32123 | 0 | 1 | 1 | 2 |
| 4 | -32123 | 0 | 1 | 1 | -32123 |
| 4+ | -32123 | 0 | 0 | 1 | -32123 |
| 5 | -32123 | 0 | 0 | 1 | -32122 |
| 5+ | -32123 | 0 | 0 | 1 | -32122 |
| 6 | -32123 | 0 | 0 | 1 | -32121 |
| 6+ | 12345 | 0 | 1 | 0 | -32121 |
| 7 | 12345 | 0 | 1 | 0 | 12345 |
| 7+ | 12345 | 1 | 1 | 0 | 12345 |
| 8 | 12345 | 1 | 1 | 0 | 0 |
| 8+ | 12345 | 0 | 1 | 1 | 0 |
| 9 | 12345 | 0 | 1 | 1 | 12345 |
| 9+ | 12345 | 1 | 1 | 1 | 12345 |
| 10 | 12345 | 1 | 1 | 1 | 0 |
| 10+ | 12345 | 0 | 0 | 1 | 0 |
| 11 | 12345 | 0 | 0 | 1 | 1 |
| 11+ | 12345 | 1 | 0 | 1 | 1 |
| 12 | 12345 | 1 | 0 | 1 | 0 |
| 12+ | 0 | 0 | 1 | 1 | 0 |
| 13 | 0 | 0 | 1 | 1 | 0 |
| 13+ | 0 | 0 | 0 | 1 | 0 |
| 14 | 0 | 0 | 0 | 1 | 1 |
| 14+ | 22222 | 1 | 0 | 0 | 1 |
| 15 | 22222 | 1 | 0 | 0 | 0 |
 
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Never mind I figured it out. thanks for looking.
 

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