Predicting Output from Triple Module Redundancy System

[aceminer]

Referring to figure Q5, which shows triplemodule
redundancy, assume that each module is configured to
calculate the same function y=f(x) on 16bit
input word x. Without knowing what is the value of x, and without
knowing the exact function f() that each module implements, determine the most likely correct output from
this system given the following information:
Output a=0001 1010 1111 1011
Output b=0010 1101 0000 0111
Output c=1000 0111 0000 1101

Hi guys, can someone explain to me what is going on. I have no clue of what does the question want. I am unable to copy down the diagram. But each module is connected to an AND gate.

Such that a AND b, b AND c, a AND c

and I would have to tell which is the correct output.

 

[Bill Simpson]

With triple modular redundancy they assume:
zero errors happen most of the time,
one error happens rarely and
two or more errors happen almost never, you sometimes or often assume this never happens.

So if you look at your outputs I think you should be trying to look at each column.
If you do that and you use the assumptions above then what do you get?

Different issue, are you sure those are AND gates and not XOR or XNOR gates?
You might want to think why I would ask a question like that.