PSPICE circuit for majority function of 3 inputs

[Dexterous]

Hello , i need some help with pspice.
i need to build a circuit with 3 entrances and 1 exit.
that will provide "1" every time there is at least tow "1" in the entrances.

x y z Z
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1

this is what i built and what i get..
any suggestions?

 

[jfgobin]

With your table, I find the relation:

$Z=A\cdot\left ( B + C\right ) + B\cdot C$
​

You should be able to build it with 4 gates.

J.

 

[Dexterous]

i need to built it with NAND gates only...