Recognizing Gate, Source & Drain for NMOS & PMOS

[nobrainer612]

Homework Statement

I saw this image in the internet. I want to learn how to recognize the gate, source and drain for NMOS and PMOS.

The Attempt at a Solution

I don't know if I am correct or not.
M8 ( with an arrow coming out ) is NMOS. M7B (with an arrow going in) is a PMOS.
I know where the gate of a NMOS and PMOS. But I really have no idea how to recognize the source and drain for PMOS and NMOS.

I found that there are many version in the internet. Like in LTSpice, Source is always next to the gate. But I am not sure for the picture above.

Thank you

 

[rude man]

Homework Statement

I saw this image in the internet. I want to learn how to recognize the gate, source and drain for NMOS and PMOS.

The Attempt at a Solution

I don't know if I am correct or not.
M8 ( with an arrow coming out ) is NMOS. M7B (with an arrow going in) is a PMOS.
I know where the gate of a NMOS and PMOS. But I really have no idea how to recognize the source and drain for PMOS and NMOS.

I found that there are many version in the internet. Like in LTSpice, Source is always next to the gate. But I am not sure for the picture above.

Thank you

Basically, the arrow is the source.

This assumes the drain (D) is more + than the source (S) for an N channel, and vice-versa for a P channel.

HOWEVER: MOS devices can be run in the inverted mode. So for example an N channel might have the drain more - than the source. In which case the device behaves as though it's got the S and D terminals reversed. But still, the convention is to call the arrowed terminal the source.

(There is often a built-in diode between the S and D so that operation in the inverted mode is limited to saturation conditions. The inverted mode is very seldom used. I once ran across it at work & it turned out to be an inadvertent connection!)