Seeing microstrip geometry in the TDR plot

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SUMMARY

The discussion analyzes a microstrip line simulated in CST with two discontinuities at 8.25mm and 36.25mm, corresponding to time delays of 170ps and 740ps based on the velocity factor. The user observes a gradual impedance change in the TDR plot, unlike the step changes seen in SPICE simulations. The impedance deviations arise from incorrect track width design, resulting in 32 ohms for narrow tracks and 20 ohms for wide tracks instead of the intended 50 ohms. Proper termination of unused ports at 50 ohms and accurate track width calculations are essential to correctly identify microstrip sections and their impedance in TDR measurements.

PREREQUISITES

  • Time Domain Reflectometry (TDR) analysis of microstrip lines
  • CST Microwave Studio simulation environment
  • Microstrip impedance calculation formulas for single and double-sided PCBs
  • Transmission line theory including impedance matching and reflection phenomena

NEXT STEPS

  • Refine microstrip track width calculations to achieve exact 50 ohm characteristic impedance
  • Implement proper 50 ohm termination for all ports in CST TDR simulations
  • Analyze transmission line filter behavior and resonance effects at λ/2 frequencies
  • Compare TDR results with SPICE simulations to validate impedance discontinuities and reflections

USEFUL FOR

RF engineers, PCB designers, and microwave simulation specialists aiming to accurately model and interpret microstrip line impedance profiles using CST and TDR techniques.

yefj
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Hello, I have built and simulated in CST a microstrip line with two discontinuetues.
looking form port 1 we have one discontinuety at 8.25mm the second one is at 36.25mm=8.25+10+18
given velicity factor 36mm and 8.25 mm roundtip where calculated at 740ps and 170ps.
few questions:
1.could you please say if you recognise the microstip geometry in the TDR?

2.I should have 3 sections of 50ohms why do you this I dont have them?

3.the plot is changing impedance graually unlike spice simulation ,what whould you reccomend to recognise start and stop of individual unique part of the microstrip?
Thanks.
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yefj said:
1.could you please say if you recognise the microstip geometry in the TDR?
Yes. It is the same from each direction, only with a different length connection = time delay.

Did you terminate the unused port in 50 ohms when simulating the TDR ?
If so, why does it show only 26 ohms at Tmax ?

yefj said:
2.I should have 3 sections of 50ohms why do you this I dont have them?
Because the design of the narrow track is for about 32 ohms.
The design of the wide track is for 20 ohms.
Did you use the equations for a single or double sided PCB ?
The simulated instrument has output Zo = 47 or 48 ohms at T=0.

yefj said:
3.the plot is changing impedance graually unlike spice simulation ,what whould you reccomend to recognise start and stop of individual unique part of the microstrip?
What you have built is a transmission line filter. The wide tracks will resonate at some λ/2 frequency, I suspect you are seeing multiple reflections.

Give it another try.
Fix the track width calculations to restore Zo = 50 ohm.
Terminate the simulated track in 50 ohms.
 

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